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[Bug 1907817] Re: qemu-aarch64 tcg assertion v5.2.0


From: Richard Henderson
Subject: [Bug 1907817] Re: qemu-aarch64 tcg assertion v5.2.0
Date: Tue, 15 Dec 2020 16:02:28 -0000

** Changed in: qemu
       Status: New => Confirmed

** Changed in: qemu
     Assignee: (unassigned) => Richard Henderson (rth)

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https://bugs.launchpad.net/bugs/1907817

Title:
  qemu-aarch64 tcg assertion v5.2.0

Status in QEMU:
  Confirmed

Bug description:
  After updating to 5.2 I am getting following assertion error:
  qemu-aarch64: ../tcg/tcg-op-gvec.c:54: check_size_align: Assertion `(maxsz & 
max_align) == 0' failed.

  I think it was introduced by commit:
  e2e7168a214b0ed98dc357bba96816486a289762

  Becasue before this change, in function simd_desc only maxsz % 8 == 0 was 
checked, but after this change qemu check for following:
   
  max_align = maxsz >= 16 ? 15 : 7;
  tcg_debug_assert((maxsz & max_align) == 0);  <--- here assertion happens

  in my case maxsz=56.

  
  Whole backtrace:
  #4  0x0000004000314770 in check_size_align (oprsz=56, maxsz=56, ofs=0) at 
../tcg/tcg-op-gvec.c:54
  #5  0x0000004000314950 in simd_desc (oprsz=56, maxsz=56, data=0) at 
../tcg/tcg-op-gvec.c:89
  #6  0x0000004000316270 in do_dup (vece=0, dofs=3144, oprsz=56, maxsz=56, 
in_32=0x0, in_64=0x0, in_c=0) at ../tcg/tcg-op-gvec.c:630
  #7  0x00000040003164d0 in expand_clr (dofs=3144, maxsz=56) at 
../tcg/tcg-op-gvec.c:679
  #8  0x0000004000319bb0 in tcg_gen_gvec_mov (vece=3, dofs=3136, aofs=3136, 
oprsz=8, maxsz=64) at ../tcg/tcg-op-gvec.c:1538
  #9  0x0000004000200dc0 in clear_vec_high (s=0x40021a8180, is_q=false, rd=0) 
at ../target/arm/translate-a64.c:592
  #10 0x0000004000200e40 in write_fp_dreg (s=0x40021a8180, reg=0, v=0x1108) at 
../target/arm/translate-a64.c:600
  --Type <RET> for more, q to quit, c to continue without paging--
  #11 0x0000004000200e90 in write_fp_sreg (s=0x40021a8180, reg=0, v=0x1060) at 
../target/arm/translate-a64.c:608
  #12 0x0000004000214210 in handle_fpfpcvt (s=0x40021a8180, rd=0, rn=0, 
opcode=2, itof=true, rmode=0, scale=64, sf=0, type=0)
      at ../target/arm/translate-a64.c:6988
  #13 0x0000004000214f90 in disas_fp_int_conv (s=0x40021a8180, insn=505544704) 
at ../target/arm/translate-a64.c:7299
  #14 0x0000004000215350 in disas_data_proc_fp (s=0x40021a8180, insn=505544704) 
at ../target/arm/translate-a64.c:7389
  #15 0x000000400022aa70 in disas_data_proc_simd_fp (s=0x40021a8180, 
insn=505544704) at ../target/arm/translate-a64.c:14494
  #16 0x000000400022af90 in disas_a64_insn (env=0x7fac59b6b490, s=0x40021a8180) 
at ../target/arm/translate-a64.c:14663
  #17 0x000000400022b750 in aarch64_tr_translate_insn (dcbase=0x40021a8180, 
cpu=0x7fac59b63150) at ../target/arm/translate-a64.c:14823
  #18 0x00000040002e8630 in translator_loop (ops=0x4000902e00 
<aarch64_translator_ops>, db=0x40021a8180, cpu=0x7fac59b63150, 
      tb=0x7fac3419c5c0, max_insns=512) at ../accel/tcg/translator.c:103
  #19 0x00000040002e3a60 in gen_intermediate_code (cpu=0x7fac59b63150, 
tb=0x7fac3419c5c0, max_insns=512)
      at ../target/arm/translate.c:9283
  #20 0x00000040002fed30 in tb_gen_code (cpu=0x7fac59b63150, pc=4458820, 
cs_base=0, flags=2148544819, cflags=-16777216)
      at ../accel/tcg/translate-all.c:1744
  #21 0x000000400036a6e0 in tb_find (cpu=0x7fac59b63150, 
last_tb=0x7fac3419c400, tb_exit=0, cf_mask=0) at ../accel/tcg/cpu-exec.c:414
  --Type <RET> for more, q to quit, c to continue without paging--
  #22 0x000000400036b040 in cpu_exec (cpu=0x7fac59b63150) at 
../accel/tcg/cpu-exec.c:770
  #23 0x0000004000113a90 in cpu_loop (env=0x7fac59b6b490) at 
../linux-user/aarch64/cpu_loop.c:84
  #24 0x00000040002fb8c0 in main (argc=2, argv=0x40021a8e68, envp=0x40021a8e80) 
at ../linux-user/main.c:864

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