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[PULL 02/20] hw/openrisc/openrisc_sim: Use IRQ splitter when connecting
From: |
Peter Maydell |
Subject: |
[PULL 02/20] hw/openrisc/openrisc_sim: Use IRQ splitter when connecting IRQ to multiple CPUs |
Date: |
Tue, 15 Dec 2020 14:12:19 +0000 |
openrisc_sim_net_init() attempts to connect the IRQ line from the
ethernet device to both CPUs in an SMP configuration by simply caling
sysbus_connect_irq() for it twice. This doesn't work, because the
second connection simply overrides the first.
Fix this by creating a TYPE_SPLIT_IRQ to split the IRQ in the SMP
case.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Stafford Horne <shorne@gmail.com>
Message-id: 20201127225127.14770-2-peter.maydell@linaro.org
---
hw/openrisc/openrisc_sim.c | 13 +++++++++++--
hw/openrisc/Kconfig | 1 +
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
index d752282e675..a8adf6b70d7 100644
--- a/hw/openrisc/openrisc_sim.c
+++ b/hw/openrisc/openrisc_sim.c
@@ -34,6 +34,7 @@
#include "hw/sysbus.h"
#include "sysemu/qtest.h"
#include "sysemu/reset.h"
+#include "hw/core/split-irq.h"
#define KERNEL_LOAD_ADDR 0x100
@@ -64,8 +65,16 @@ static void openrisc_sim_net_init(hwaddr base, hwaddr
descriptors,
s = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(s, &error_fatal);
- for (i = 0; i < num_cpus; i++) {
- sysbus_connect_irq(s, 0, cpu_irqs[i][irq_pin]);
+ if (num_cpus > 1) {
+ DeviceState *splitter = qdev_new(TYPE_SPLIT_IRQ);
+ qdev_prop_set_uint32(splitter, "num-lines", num_cpus);
+ qdev_realize_and_unref(splitter, NULL, &error_fatal);
+ for (i = 0; i < num_cpus; i++) {
+ qdev_connect_gpio_out(splitter, i, cpu_irqs[i][irq_pin]);
+ }
+ sysbus_connect_irq(s, 0, qdev_get_gpio_in(splitter, 0));
+ } else {
+ sysbus_connect_irq(s, 0, cpu_irqs[0][irq_pin]);
}
sysbus_mmio_map(s, 0, base);
sysbus_mmio_map(s, 1, descriptors);
diff --git a/hw/openrisc/Kconfig b/hw/openrisc/Kconfig
index 6c1e86884e2..8f284f3ba04 100644
--- a/hw/openrisc/Kconfig
+++ b/hw/openrisc/Kconfig
@@ -3,3 +3,4 @@ config OR1K_SIM
select SERIAL
select OPENCORES_ETH
select OMPIC
+ select SPLIT_IRQ
--
2.20.1
- [PULL 00/20] target-arm queue, Peter Maydell, 2020/12/15
- [PULL 04/20] target/openrisc: Move pic_cpu code into CPU object proper, Peter Maydell, 2020/12/15
- [PULL 05/20] target/nios2: Move IIC code into CPU object proper, Peter Maydell, 2020/12/15
- [PULL 02/20] hw/openrisc/openrisc_sim: Use IRQ splitter when connecting IRQ to multiple CPUs,
Peter Maydell <=
- [PULL 03/20] hw/openrisc/openrisc_sim: Abstract out "get IRQ x of CPU y", Peter Maydell, 2020/12/15
- [PULL 07/20] target/nios2: Use deposit32() to update ipending register, Peter Maydell, 2020/12/15
- [PULL 10/20] elf_ops.h: Don't truncate name of the ROM blobs we create, Peter Maydell, 2020/12/15
- [PULL 09/20] hw/core/loader.c: Improve reporting of ROM overlap errors, Peter Maydell, 2020/12/15
- [PULL 06/20] target/nios2: Move nios2_check_interrupts() into target/nios2, Peter Maydell, 2020/12/15
- [PULL 11/20] elf_ops.h: Be more verbose with ROM blob names, Peter Maydell, 2020/12/15
- [PULL 01/20] gdbstub: Correct misparsing of vCont C/S requests, Peter Maydell, 2020/12/15
- [PULL 15/20] arm: xlnx-versal: Connect usb to virt-versal, Peter Maydell, 2020/12/15
- [PULL 14/20] usb: xlnx-usb-subsystem: Add xilinx usb subsystem, Peter Maydell, 2020/12/15
- [PULL 13/20] usb: Add DWC3 model, Peter Maydell, 2020/12/15