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Re: [PATCH 0/3] target/openrisc: Move pic_cpu code into CPU object
From: |
Peter Maydell |
Subject: |
Re: [PATCH 0/3] target/openrisc: Move pic_cpu code into CPU object |
Date: |
Fri, 11 Dec 2020 13:57:06 +0000 |
On Fri, 27 Nov 2020 at 22:51, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> The openrisc code uses an old style of interrupt handling, where a
> separate standalone set of qemu_irqs invoke a function
> openrisc_pic_cpu_handler() which signals the interrupt to the CPU
> proper by directly calling cpu_interrupt() and cpu_reset_interrupt().
> Because CPU objects now inherit (indirectly) from TYPE_DEVICE, they
> can have GPIO input lines themselves, and the neater modern way to
> implement this is to simply have the CPU object itself provide the
> input IRQ lines.
>
> The main aim of this patch series is to make that refactoring,
> which fixes a trivial memory leak reported by Coverity of the IRQs
> allocated in cpu_openrisc_pic_init(), and removes one callsite of
> the qemu_allocate_irqs() function.
>
> Patch 1 is a minor bugfix noticed along the way; patch 2 is
> there to make the change in patch 3 simpler and clearer to review.
>
> Tested with 'make check' and 'make check-acceptance'.
Now the tree is open for 6.0 development, I'll take this
via target-arm.next, since Stafford doesn't have any other
openrisc patches in a queue currently.
thanks
-- PMM
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