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[PATCH RFC v4 02/15] target/riscv: Add target/riscv/kvm.c to place the p
From: |
Yifei Jiang |
Subject: |
[PATCH RFC v4 02/15] target/riscv: Add target/riscv/kvm.c to place the public kvm interface |
Date: |
Thu, 3 Dec 2020 20:46:50 +0800 |
Add target/riscv/kvm.c to place kvm_arch_* function needed by
kvm/kvm-all.c. Meanwhile, add kvm support in meson.build file.
Signed-off-by: Yifei Jiang <jiangyifei@huawei.com>
Signed-off-by: Yipeng Yin <yinyipeng1@huawei.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
meson.build | 2 +
target/riscv/kvm.c | 128 +++++++++++++++++++++++++++++++++++++++
target/riscv/meson.build | 1 +
3 files changed, 131 insertions(+)
create mode 100644 target/riscv/kvm.c
diff --git a/meson.build b/meson.build
index e3386196ba..14728b77ab 100644
--- a/meson.build
+++ b/meson.build
@@ -69,6 +69,8 @@ elif cpu in ['ppc', 'ppc64']
kvm_targets = ['ppc-softmmu', 'ppc64-softmmu']
elif cpu in ['mips', 'mips64']
kvm_targets = ['mips-softmmu', 'mipsel-softmmu', 'mips64-softmmu',
'mips64el-softmmu']
+elif cpu in ['riscv32', 'riscv64']
+ kvm_targets = ['riscv32-softmmu', 'riscv64-softmmu']
else
kvm_targets = []
endif
diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c
new file mode 100644
index 0000000000..8c386d9acf
--- /dev/null
+++ b/target/riscv/kvm.c
@@ -0,0 +1,128 @@
+/*
+ * RISC-V implementation of KVM hooks
+ *
+ * Copyright (c) 2020 Huawei Technologies Co., Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2 or later, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "qemu/osdep.h"
+#include <sys/ioctl.h>
+
+#include <linux/kvm.h>
+
+#include "qemu-common.h"
+#include "qemu/timer.h"
+#include "qemu/error-report.h"
+#include "qemu/main-loop.h"
+#include "sysemu/sysemu.h"
+#include "sysemu/kvm.h"
+#include "sysemu/kvm_int.h"
+#include "cpu.h"
+#include "trace.h"
+#include "hw/pci/pci.h"
+#include "exec/memattrs.h"
+#include "exec/address-spaces.h"
+#include "hw/boards.h"
+#include "hw/irq.h"
+#include "qemu/log.h"
+#include "hw/loader.h"
+
+const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
+ KVM_CAP_LAST_INFO
+};
+
+int kvm_arch_get_registers(CPUState *cs)
+{
+ return 0;
+}
+
+int kvm_arch_put_registers(CPUState *cs, int level)
+{
+ return 0;
+}
+
+int kvm_arch_release_virq_post(int virq)
+{
+ return 0;
+}
+
+int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,
+ uint64_t address, uint32_t data, PCIDevice *dev)
+{
+ return 0;
+}
+
+int kvm_arch_destroy_vcpu(CPUState *cs)
+{
+ return 0;
+}
+
+unsigned long kvm_arch_vcpu_id(CPUState *cpu)
+{
+ return cpu->cpu_index;
+}
+
+void kvm_arch_init_irq_routing(KVMState *s)
+{
+}
+
+int kvm_arch_init_vcpu(CPUState *cs)
+{
+ return 0;
+}
+
+int kvm_arch_msi_data_to_gsi(uint32_t data)
+{
+ abort();
+}
+
+int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route,
+ int vector, PCIDevice *dev)
+{
+ return 0;
+}
+
+int kvm_arch_init(MachineState *ms, KVMState *s)
+{
+ return 0;
+}
+
+int kvm_arch_irqchip_create(KVMState *s)
+{
+ return 0;
+}
+
+int kvm_arch_process_async_events(CPUState *cs)
+{
+ return 0;
+}
+
+void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run)
+{
+}
+
+MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
+{
+ return MEMTXATTRS_UNSPECIFIED;
+}
+
+bool kvm_arch_stop_on_emulation_error(CPUState *cs)
+{
+ return true;
+}
+
+int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
+{
+ return 0;
+}
diff --git a/target/riscv/meson.build b/target/riscv/meson.build
index 14a5c62dac..12e9c074af 100644
--- a/target/riscv/meson.build
+++ b/target/riscv/meson.build
@@ -23,6 +23,7 @@ riscv_ss.add(files(
'vector_helper.c',
'translate.c',
))
+riscv_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'))
riscv_softmmu_ss = ss.source_set()
riscv_softmmu_ss.add(files(
--
2.19.1
- [PATCH RFC v4 00/15] Add riscv kvm accel support, Yifei Jiang, 2020/12/03
- [PATCH RFC v4 01/15] linux-header: Update linux/kvm.h, Yifei Jiang, 2020/12/03
- [PATCH RFC v4 07/15] hw/riscv: PLIC update external interrupt by KVM when kvm enabled, Yifei Jiang, 2020/12/03
- [PATCH RFC v4 02/15] target/riscv: Add target/riscv/kvm.c to place the public kvm interface,
Yifei Jiang <=
- [PATCH RFC v4 04/15] target/riscv: Implement kvm_arch_get_registers, Yifei Jiang, 2020/12/03
- [PATCH RFC v4 05/15] target/riscv: Implement kvm_arch_put_registers, Yifei Jiang, 2020/12/03
- [PATCH RFC v4 03/15] target/riscv: Implement function kvm_arch_init_vcpu, Yifei Jiang, 2020/12/03
- [PATCH RFC v4 08/15] target/riscv: Handle KVM_EXIT_RISCV_SBI exit, Yifei Jiang, 2020/12/03
- [PATCH RFC v4 06/15] target/riscv: Support start kernel directly by KVM, Yifei Jiang, 2020/12/03
- [PATCH RFC v4 11/15] target/riscv: Implement virtual time adjusting with vm state changing, Yifei Jiang, 2020/12/03
- [PATCH RFC v4 10/15] target/riscv: Add kvm_riscv_get/put_regs_timer, Yifei Jiang, 2020/12/03