[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH 0/3] target/mips: Add some CP0/MMU missing definitions
|
From: |
Philippe Mathieu-Daudé |
|
Subject: |
[PATCH 0/3] target/mips: Add some CP0/MMU missing definitions |
|
Date: |
Tue, 1 Dec 2020 14:28:14 +0100 |
Add some MIPS3 and R6 definitions to ease code review.
Philippe Mathieu-Daudé (3):
target/mips: Add CP0 Config0 register definitions for MIPS3 ISA
target/mips: Replace CP0_Config0 magic values by proper definitions
target/mips: Explicit Release 6 MMU types
target/mips/cpu.h | 11 +++++++++--
target/mips/internal.h | 9 +++++----
target/mips/translate_init.c.inc | 14 ++++++++------
3 files changed, 22 insertions(+), 12 deletions(-)
--
2.26.2
- [PATCH 0/3] target/mips: Add some CP0/MMU missing definitions,
Philippe Mathieu-Daudé <=
- [PATCH 1/3] target/mips: Add CP0 Config0 register definitions for MIPS3 ISA, Philippe Mathieu-Daudé, 2020/12/01
- [PATCH 2/3] target/mips: Replace CP0_Config0 magic values by proper definitions, Philippe Mathieu-Daudé, 2020/12/01
- [PATCH 3/3] target/mips: Explicit Release 6 MMU types, Philippe Mathieu-Daudé, 2020/12/01
- Re: [PATCH 0/3] target/mips: Add some CP0/MMU missing definitions, Richard Henderson, 2020/12/01
- Re: [PATCH 0/3] target/mips: Add some CP0/MMU missing definitions, Philippe Mathieu-Daudé, 2020/12/07