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[PATCH v2 02/28] target/mips: Extract FPU helpers to 'fpu_helper.h'
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH v2 02/28] target/mips: Extract FPU helpers to 'fpu_helper.h' |
Date: |
Mon, 23 Nov 2020 21:44:22 +0100 |
Extract FPU specific helpers from "internal.h" to "fpu_helper.h".
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201120210844.2625602-2-f4bug@amsat.org>
---
target/mips/fpu_helper.h | 50 ++++++++++++++++++++++++++++++++++++++
target/mips/internal.h | 43 --------------------------------
linux-user/mips/cpu_loop.c | 1 +
target/mips/fpu_helper.c | 1 +
target/mips/gdbstub.c | 1 +
target/mips/kvm.c | 1 +
target/mips/machine.c | 1 +
target/mips/msa_helper.c | 1 +
target/mips/translate.c | 1 +
9 files changed, 57 insertions(+), 43 deletions(-)
create mode 100644 target/mips/fpu_helper.h
diff --git a/target/mips/fpu_helper.h b/target/mips/fpu_helper.h
new file mode 100644
index 00000000000..3aaee3f3430
--- /dev/null
+++ b/target/mips/fpu_helper.h
@@ -0,0 +1,50 @@
+/*
+ * Helpers for emulation of FPU-related MIPS instructions.
+ *
+ * Copyright (C) 2004-2005 Jocelyn Mayer
+ *
+ * SPDX-License-Identifier: LGPL-2.1-or-later
+ */
+#include "fpu/softfloat-helpers.h"
+#include "cpu.h"
+
+extern const FloatRoundMode ieee_rm[4];
+
+uint32_t float_class_s(uint32_t arg, float_status *fst);
+uint64_t float_class_d(uint64_t arg, float_status *fst);
+
+static inline void restore_rounding_mode(CPUMIPSState *env)
+{
+ set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3],
+ &env->active_fpu.fp_status);
+}
+
+static inline void restore_flush_mode(CPUMIPSState *env)
+{
+ set_flush_to_zero((env->active_fpu.fcr31 & (1 << FCR31_FS)) != 0,
+ &env->active_fpu.fp_status);
+}
+
+static inline void restore_snan_bit_mode(CPUMIPSState *env)
+{
+ set_snan_bit_is_one((env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) == 0,
+ &env->active_fpu.fp_status);
+}
+
+static inline void restore_fp_status(CPUMIPSState *env)
+{
+ restore_rounding_mode(env);
+ restore_flush_mode(env);
+ restore_snan_bit_mode(env);
+}
+
+static inline void restore_msa_fp_status(CPUMIPSState *env)
+{
+ float_status *status = &env->active_tc.msa_fp_status;
+ int rounding_mode = (env->active_tc.msacsr & MSACSR_RM_MASK) >> MSACSR_RM;
+ bool flush_to_zero = (env->active_tc.msacsr & MSACSR_FS_MASK) != 0;
+
+ set_float_rounding_mode(ieee_rm[rounding_mode], status);
+ set_flush_to_zero(flush_to_zero, status);
+ set_flush_inputs_to_zero(flush_to_zero, status);
+}
diff --git a/target/mips/internal.h b/target/mips/internal.h
index bbd10e9d45f..7bea3af0b29 100644
--- a/target/mips/internal.h
+++ b/target/mips/internal.h
@@ -8,8 +8,6 @@
#ifndef MIPS_INTERNAL_H
#define MIPS_INTERNAL_H
-#include "fpu/softfloat-helpers.h"
-
/*
* MMU types, the first four entries have the same layout as the
* CP0C0_MT field.
@@ -222,49 +220,8 @@ bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int
size,
bool probe, uintptr_t retaddr);
/* op_helper.c */
-uint32_t float_class_s(uint32_t arg, float_status *fst);
-uint64_t float_class_d(uint64_t arg, float_status *fst);
-
-extern const FloatRoundMode ieee_rm[4];
-
void update_pagemask(CPUMIPSState *env, target_ulong arg1, int32_t *pagemask);
-static inline void restore_rounding_mode(CPUMIPSState *env)
-{
- set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3],
- &env->active_fpu.fp_status);
-}
-
-static inline void restore_flush_mode(CPUMIPSState *env)
-{
- set_flush_to_zero((env->active_fpu.fcr31 & (1 << FCR31_FS)) != 0,
- &env->active_fpu.fp_status);
-}
-
-static inline void restore_snan_bit_mode(CPUMIPSState *env)
-{
- set_snan_bit_is_one((env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) == 0,
- &env->active_fpu.fp_status);
-}
-
-static inline void restore_fp_status(CPUMIPSState *env)
-{
- restore_rounding_mode(env);
- restore_flush_mode(env);
- restore_snan_bit_mode(env);
-}
-
-static inline void restore_msa_fp_status(CPUMIPSState *env)
-{
- float_status *status = &env->active_tc.msa_fp_status;
- int rounding_mode = (env->active_tc.msacsr & MSACSR_RM_MASK) >> MSACSR_RM;
- bool flush_to_zero = (env->active_tc.msacsr & MSACSR_FS_MASK) != 0;
-
- set_float_rounding_mode(ieee_rm[rounding_mode], status);
- set_flush_to_zero(flush_to_zero, status);
- set_flush_inputs_to_zero(flush_to_zero, status);
-}
-
static inline void restore_pamask(CPUMIPSState *env)
{
if (env->hflags & MIPS_HFLAG_ELPA) {
diff --git a/linux-user/mips/cpu_loop.c b/linux-user/mips/cpu_loop.c
index cfe7ba5c47d..b58dbeb83d1 100644
--- a/linux-user/mips/cpu_loop.c
+++ b/linux-user/mips/cpu_loop.c
@@ -23,6 +23,7 @@
#include "cpu_loop-common.h"
#include "elf.h"
#include "internal.h"
+#include "fpu_helper.h"
# ifdef TARGET_ABI_MIPSO32
# define MIPS_SYSCALL_NUMBER_UNUSED -1
diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c
index 501bd401a16..7d949cd8e3a 100644
--- a/target/mips/fpu_helper.c
+++ b/target/mips/fpu_helper.c
@@ -31,6 +31,7 @@
#include "exec/memop.h"
#include "sysemu/kvm.h"
#include "fpu/softfloat.h"
+#include "fpu_helper.h"
/* Complex FPU operations which may need stack space. */
diff --git a/target/mips/gdbstub.c b/target/mips/gdbstub.c
index e39f8d75cf0..f1c2a2cf6d6 100644
--- a/target/mips/gdbstub.c
+++ b/target/mips/gdbstub.c
@@ -21,6 +21,7 @@
#include "cpu.h"
#include "internal.h"
#include "exec/gdbstub.h"
+#include "fpu_helper.h"
int mips_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
diff --git a/target/mips/kvm.c b/target/mips/kvm.c
index 72637a1e021..df47eded328 100644
--- a/target/mips/kvm.c
+++ b/target/mips/kvm.c
@@ -27,6 +27,7 @@
#include "kvm_mips.h"
#include "exec/memattrs.h"
#include "hw/boards.h"
+#include "fpu_helper.h"
#define DEBUG_KVM 0
diff --git a/target/mips/machine.c b/target/mips/machine.c
index 5b23e3e912a..a4ea67c2980 100644
--- a/target/mips/machine.c
+++ b/target/mips/machine.c
@@ -2,6 +2,7 @@
#include "cpu.h"
#include "internal.h"
#include "migration/cpu.h"
+#include "fpu_helper.h"
static int cpu_post_load(void *opaque, int version_id)
{
diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c
index 249f0fdad80..b89b4c44902 100644
--- a/target/mips/msa_helper.c
+++ b/target/mips/msa_helper.c
@@ -23,6 +23,7 @@
#include "exec/exec-all.h"
#include "exec/helper-proto.h"
#include "fpu/softfloat.h"
+#include "fpu_helper.h"
/* Data format min and max values */
#define DF_BITS(df) (1 << ((df) + 3))
diff --git a/target/mips/translate.c b/target/mips/translate.c
index c64a1bc42e1..5ec9fd7e92a 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -39,6 +39,7 @@
#include "exec/translator.h"
#include "exec/log.h"
#include "qemu/qemu-print.h"
+#include "fpu_helper.h"
#define MIPS_DEBUG_DISAS 0
--
2.26.2
- [PATCH v2 00/28] target/mips: Explode 60% of the 32K-lines translate.c, Philippe Mathieu-Daudé, 2020/11/23
- [PATCH v2 01/28] target/mips: Use FloatRoundMode enum for FCR31 modes conversion, Philippe Mathieu-Daudé, 2020/11/23
- [PATCH v2 02/28] target/mips: Extract FPU helpers to 'fpu_helper.h',
Philippe Mathieu-Daudé <=
- [PATCH v2 03/28] target/mips: Rename msa_helper.c as mod-msa_helper.c, Philippe Mathieu-Daudé, 2020/11/23
- [PATCH v2 04/28] target/mips: Extract MSA helpers from op_helper.c, Philippe Mathieu-Daudé, 2020/11/23
- [PATCH v2 05/28] target/mips: Extract MSA helper definitions, Philippe Mathieu-Daudé, 2020/11/23
- [PATCH v2 06/28] target/mips: Extract MSA translation routines, Philippe Mathieu-Daudé, 2020/11/23
- [PATCH v2 07/28] target/mips: Rename dsp_helper.c as mod-dsp_helper.c, Philippe Mathieu-Daudé, 2020/11/23
- [PATCH v2 08/28] target/mips: Extract DSP helper definitions, Philippe Mathieu-Daudé, 2020/11/23
- [PATCH v2 09/28] target/mips: Extract DSP translation routines, Philippe Mathieu-Daudé, 2020/11/23
- [PATCH v2 10/28] target/mips: Extract Multi-Threading helper definitions, Philippe Mathieu-Daudé, 2020/11/23