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[PATCH v2 08/28] target/arm: Move general-use constant expanders up in t
From: |
Peter Maydell |
Subject: |
[PATCH v2 08/28] target/arm: Move general-use constant expanders up in translate.c |
Date: |
Thu, 19 Nov 2020 21:55:57 +0000 |
The constant-expander functions like negate, plus_2, etc, are
generally useful; move them up in translate.c so we can use them in
the VFP/Neon decoders as well as in the A32/T32/T16 decoders.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/translate.c | 46 +++++++++++++++++++++++-------------------
1 file changed, 25 insertions(+), 21 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 47a1a5739c8..f5acd32e76a 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -109,6 +109,30 @@ static void arm_gen_condlabel(DisasContext *s)
}
}
+/*
+ * Constant expanders for the decoders.
+ */
+
+static int negate(DisasContext *s, int x)
+{
+ return -x;
+}
+
+static int plus_2(DisasContext *s, int x)
+{
+ return x + 2;
+}
+
+static int times_2(DisasContext *s, int x)
+{
+ return x * 2;
+}
+
+static int times_4(DisasContext *s, int x)
+{
+ return x * 4;
+}
+
/* Flags for the disas_set_da_iss info argument:
* lower bits hold the Rt register number, higher bits are flags.
*/
@@ -5177,29 +5201,9 @@ static void arm_skip_unless(DisasContext *s, uint32_t
cond)
/*
- * Constant expanders for the decoders.
+ * Constant expanders used by T16/T32 decode
*/
-static int negate(DisasContext *s, int x)
-{
- return -x;
-}
-
-static int plus_2(DisasContext *s, int x)
-{
- return x + 2;
-}
-
-static int times_2(DisasContext *s, int x)
-{
- return x * 2;
-}
-
-static int times_4(DisasContext *s, int x)
-{
- return x * 4;
-}
-
/* Return only the rotation part of T32ExpandImm. */
static int t32_expandimm_rot(DisasContext *s, int x)
{
--
2.20.1
- [PATCH v2 00/28] target/arm: Implement v8.1M and Cortex-M55, Peter Maydell, 2020/11/19
- [PATCH v2 02/28] target/arm: Implement v8.1M PXN extension, Peter Maydell, 2020/11/19
- [PATCH v2 01/28] hw/intc/armv7m_nvic: Make all of system PPB range be RAZWI/BusFault, Peter Maydell, 2020/11/19
- [PATCH v2 03/28] target/arm: Don't clobber ID_PFR1.Security on M-profile cores, Peter Maydell, 2020/11/19
- [PATCH v2 04/28] target/arm: Implement VSCCLRM insn, Peter Maydell, 2020/11/19
- [PATCH v2 06/28] target/arm: Enforce M-profile VMRS/VMSR register restrictions, Peter Maydell, 2020/11/19
- [PATCH v2 05/28] target/arm: Implement CLRM instruction, Peter Maydell, 2020/11/19
- [PATCH v2 07/28] target/arm: Refactor M-profile VMSR/VMRS handling, Peter Maydell, 2020/11/19
- [PATCH v2 08/28] target/arm: Move general-use constant expanders up in translate.c,
Peter Maydell <=
- [PATCH v2 10/28] target/arm: Implement M-profile FPSCR_nzcvqc, Peter Maydell, 2020/11/19
- [PATCH v2 09/28] target/arm: Implement VLDR/VSTR system register, Peter Maydell, 2020/11/19
- [PATCH v2 14/28] target/arm: Implement FPCXT_NS fp system register, Peter Maydell, 2020/11/19
- [PATCH v2 12/28] target/arm: Factor out preserve-fp-state from full_vfp_access_check(), Peter Maydell, 2020/11/19
- [PATCH v2 17/28] target/arm: In v8.1M, don't set HFSR.FORCED on vector table fetch failures, Peter Maydell, 2020/11/19
- [PATCH v2 13/28] target/arm: Implement FPCXT_S fp system register, Peter Maydell, 2020/11/19
- [PATCH v2 11/28] target/arm: Use new FPCR_NZCV_MASK constant, Peter Maydell, 2020/11/19
- [PATCH v2 16/28] target/arm: For v8.1M, always clear R0-R3, R12, APSR, EPSR on exception entry, Peter Maydell, 2020/11/19
- [PATCH v2 15/28] hw/intc/armv7m_nvic: Update FPDSCR masking for v8.1M, Peter Maydell, 2020/11/19