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[PATCH v10 2/9] fw_cfg: Refactor extra pci roots addition
From: |
Jiahui Cen |
Subject: |
[PATCH v10 2/9] fw_cfg: Refactor extra pci roots addition |
Date: |
Thu, 19 Nov 2020 09:48:34 +0800 |
Extract extra pci roots addition from pc machine, which could be used by
other machines.
In order to make uefi get the extra roots, it is necessary to write extra
roots into fw_cfg. And only if the uefi knows there are extra roots,
the config spaces of devices behind the root could be obtained.
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Signed-off-by: Yubo Miao <miaoyubo@huawei.com>
---
hw/i386/pc.c | 18 +--------------
hw/nvram/fw_cfg.c | 23 ++++++++++++++++++++
include/hw/nvram/fw_cfg.h | 9 ++++++++
3 files changed, 33 insertions(+), 17 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 17b514d1da..76a846ff9a 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -777,27 +777,11 @@ void pc_machine_done(Notifier *notifier, void *data)
PCMachineState *pcms = container_of(notifier,
PCMachineState, machine_done);
X86MachineState *x86ms = X86_MACHINE(pcms);
- PCIBus *bus = pcms->bus;
/* set the number of CPUs */
x86_rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus);
- if (bus) {
- int extra_hosts = 0;
-
- QLIST_FOREACH(bus, &bus->child, sibling) {
- /* look for expander root buses */
- if (pci_bus_is_root(bus)) {
- extra_hosts++;
- }
- }
- if (extra_hosts && x86ms->fw_cfg) {
- uint64_t *val = g_malloc(sizeof(*val));
- *val = cpu_to_le64(extra_hosts);
- fw_cfg_add_file(x86ms->fw_cfg,
- "etc/extra-pci-roots", val, sizeof(*val));
- }
- }
+ fw_cfg_add_extra_pci_roots(pcms->bus, x86ms->fw_cfg);
acpi_setup();
if (x86ms->fw_cfg) {
diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c
index 08539a1aab..282ba93e2e 100644
--- a/hw/nvram/fw_cfg.c
+++ b/hw/nvram/fw_cfg.c
@@ -40,6 +40,7 @@
#include "qemu/cutils.h"
#include "qapi/error.h"
#include "hw/acpi/aml-build.h"
+#include "hw/pci/pci_bus.h"
#define FW_CFG_FILE_SLOTS_DFLT 0x20
@@ -1061,6 +1062,28 @@ bool fw_cfg_add_from_generator(FWCfgState *s, const char
*filename,
return true;
}
+void fw_cfg_add_extra_pci_roots(PCIBus *bus, FWCfgState *s)
+{
+ int extra_hosts = 0;
+
+ if (!bus) {
+ return;
+ }
+
+ QLIST_FOREACH(bus, &bus->child, sibling) {
+ /* look for expander root buses */
+ if (pci_bus_is_root(bus)) {
+ extra_hosts++;
+ }
+ }
+
+ if (extra_hosts && s) {
+ uint64_t *val = g_malloc(sizeof(*val));
+ *val = cpu_to_le64(extra_hosts);
+ fw_cfg_add_file(s, "etc/extra-pci-roots", val, sizeof(*val));
+ }
+}
+
static void fw_cfg_machine_reset(void *opaque)
{
MachineClass *mc = MACHINE_GET_CLASS(qdev_get_machine());
diff --git a/include/hw/nvram/fw_cfg.h b/include/hw/nvram/fw_cfg.h
index 8a9f5738bf..0e7a8bc7af 100644
--- a/include/hw/nvram/fw_cfg.h
+++ b/include/hw/nvram/fw_cfg.h
@@ -308,6 +308,15 @@ void *fw_cfg_modify_file(FWCfgState *s, const char
*filename, void *data,
bool fw_cfg_add_from_generator(FWCfgState *s, const char *filename,
const char *gen_id, Error **errp);
+/**
+ * fw_cfg_add_extra_pci_roots:
+ * @bus: main pci root bus to be scanned from
+ * @s: fw_cfg device being modified
+ *
+ * Add a new fw_cfg item...
+ */
+void fw_cfg_add_extra_pci_roots(PCIBus *bus, FWCfgState *s);
+
FWCfgState *fw_cfg_init_io_dma(uint32_t iobase, uint32_t dma_iobase,
AddressSpace *dma_as);
FWCfgState *fw_cfg_init_io(uint32_t iobase);
--
2.28.0
- [PATCH v10 0/9] pci_expander_brdige:acpi: Support pxb-pcie for ARM, Jiahui Cen, 2020/11/18
- [PATCH v10 6/9] acpi: Align the size to 128k, Jiahui Cen, 2020/11/18
- [PATCH v10 3/9] hw/arm/virt: Write extra pci roots into fw_cfg, Jiahui Cen, 2020/11/18
- [PATCH v10 9/9] unit-test: Add the binary file and clear diff.h, Jiahui Cen, 2020/11/18
- [PATCH v10 4/9] acpi: Extract crs build form acpi_build.c, Jiahui Cen, 2020/11/18
- [PATCH v10 1/9] acpi/gpex: Extract two APIs from acpi_dsdt_add_pci, Jiahui Cen, 2020/11/18
- [PATCH v10 7/9] unit-test: The files changed., Jiahui Cen, 2020/11/18
- [PATCH v10 5/9] acpi/gpex: Build tables for pxb, Jiahui Cen, 2020/11/18
- [PATCH v10 8/9] unit-test: Add testcase for pxb, Jiahui Cen, 2020/11/18
- [PATCH v10 2/9] fw_cfg: Refactor extra pci roots addition,
Jiahui Cen <=