Re: [PATCH 05/15] target/arm: Implement CLRM instruction

[Richard Henderson]

On 11/16/20 8:08 AM, Peter Maydell wrote:
> In v8.1M the new CLRM instruction allows zeroing an arbitrary set of
> the general-purpose registers and APSR.  Implement this.
> 
> The encoding is a subset of the LDMIA T2 encoding, using what would
> be Rn=0b1111 (which UNDEFs for LDMIA).
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>  target/arm/t32.decode  |  6 +++++-
>  target/arm/translate.c | 38 ++++++++++++++++++++++++++++++++++++++
>  2 files changed, 43 insertions(+), 1 deletion(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~