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[RFC PATCH 21/25] acpi/cxl: Introduce a compat-driver UUID for CXL _OSC
From: |
Ben Widawsky |
Subject: |
[RFC PATCH 21/25] acpi/cxl: Introduce a compat-driver UUID for CXL _OSC |
Date: |
Tue, 10 Nov 2020 21:47:20 -0800 |
From: Vishal Verma <vishal.l.verma@intel.com>
Introduce a new UUID for CXL _OSC that only sets CXL related 'Support'
and Control' Dwords, independent of PCI/PCIe Dwords. This is a proposal
and an example AML implementation to demonstrate what such a compat UUID
would look like.
The AML resulting from this change is:
Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities
{
CreateDWordField (Arg3, Zero, CDW1)
If ((((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /*
PCI Host Bridge Device */) || (Arg0 == ToUUID
("68f2d50b-c469-4d8a-bd3d-941a103fd3fc"))) || (
Arg0 == ToUUID ("a4d1629d-ff52-4888-be96-e5cade548db1"))))
{
If ((Arg0 == ToUUID ("a4d1629d-ff52-4888-be96-e5cade548db1")))
{
CreateDWordField (Arg3, 0x04, CDW2)
CreateDWordField (Arg3, 0x08, CDW3)
SUPC = CDW2 /* \_SB_.CXL0._OSC.CDW2 */
CTRC = CDW3 /* \_SB_.CXL0._OSC.CDW3 */
CDW3 |= One
Return (Arg3)
}
Else
{
CreateDWordField (Arg3, 0x04, CDW2)
CreateDWordField (Arg3, 0x08, CDW3)
Local0 = CDW3 /* \_SB_.CXL0._OSC.CDW3 */
CTRL &= 0x1F
If ((Arg1 != One))
{
CDW1 |= 0x08
}
If ((CDW3 != Local0))
{
CDW1 |= 0x10
}
SUPP = CDW2 /* \_SB_.CXL0._OSC.CDW2 */
CTRL = CDW3 /* \_SB_.CXL0._OSC.CDW3 */
If ((Arg0 == ToUUID
("68f2d50b-c469-4d8a-bd3d-941a103fd3fc")))
{
CreateDWordField (Arg3, 0x0C, CDW4)
CreateDWordField (Arg3, 0x10, CDW5)
SUPC = CDW4 /* \_SB_.CXL0._OSC.CDW4 */
CTRC = CDW5 /* \_SB_.CXL0._OSC.CDW5 */
CDW5 |= One
}
CDW3 = Local0
Return (Arg3)
}
}
Return (Arg3)
Else
{
CDW1 |= 0x04
}
}
Signed-off-by: Vishal Verma <vishal.l.verma@intel.com>
---
hw/acpi/cxl.c | 54 ++++++++++++++++++++++++++++++++++++---------------
1 file changed, 38 insertions(+), 16 deletions(-)
diff --git a/hw/acpi/cxl.c b/hw/acpi/cxl.c
index 7124d5a1a3..31ceaeecc3 100644
--- a/hw/acpi/cxl.c
+++ b/hw/acpi/cxl.c
@@ -29,6 +29,7 @@
static Aml *__build_cxl_osc_method(void)
{
Aml *method, *if_uuid, *else_uuid, *if_arg1_not_1, *if_cxl,
*if_caps_masked;
+ Aml *if_compat, *else_nocompat;
Aml *a_ctrl = aml_local(0);
Aml *a_cdw1 = aml_name("CDW1");
@@ -37,31 +38,51 @@ static Aml *__build_cxl_osc_method(void)
/* 9.14.2.1.4 */
if_uuid = aml_if(
- aml_lor(aml_equal(aml_arg(0),
+ aml_lor(
+ aml_lor(aml_equal(aml_arg(0),
aml_touuid("33DB4D5B-1FF7-401C-9657-7441C03DD766")),
- aml_equal(aml_arg(0),
-
aml_touuid("68F2D50B-C469-4D8A-BD3D-941A103FD3FC"))));
- aml_append(if_uuid, aml_create_dword_field(aml_arg(3), aml_int(4),
"CDW2"));
- aml_append(if_uuid, aml_create_dword_field(aml_arg(3), aml_int(8),
"CDW3"));
-
- aml_append(if_uuid, aml_store(aml_name("CDW3"), a_ctrl));
+ aml_equal(aml_arg(0),
+ aml_touuid("68F2D50B-C469-4D8A-BD3D-941A103FD3FC"))),
+ aml_equal(aml_arg(0),
+
aml_touuid("A4D1629D-FF52-4888-BE96-E5CADE548DB1"))));
+
+ if_compat = aml_if(aml_equal(aml_arg(0),
+ aml_touuid("A4D1629D-FF52-4888-BE96-E5CADE548DB1")));
+ aml_append(if_compat,
+ aml_create_dword_field(aml_arg(3), aml_int(4), "CDW2"));
+ aml_append(if_compat,
+ aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
+ aml_append(if_compat, aml_store(aml_name("CDW2"), aml_name("SUPC")));
+ aml_append(if_compat, aml_store(aml_name("CDW3"), aml_name("CTRC")));
+ aml_append(if_compat,
+ aml_or(aml_name("CDW3"), aml_int(0x1), aml_name("CDW3")));
+ aml_append(if_compat, aml_return(aml_arg(3)));
+ aml_append(if_uuid, if_compat);
+
+ else_nocompat = aml_else();
+ aml_append(else_nocompat,
+ aml_create_dword_field(aml_arg(3), aml_int(4), "CDW2"));
+ aml_append(else_nocompat,
+ aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
+
+ aml_append(else_nocompat, aml_store(aml_name("CDW3"), a_ctrl));
/* This is all the same as what's used for PCIe */
- aml_append(if_uuid,
+ aml_append(else_nocompat,
aml_and(aml_name("CTRL"), aml_int(0x1F), aml_name("CTRL")));
if_arg1_not_1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
/* Unknown revision */
aml_append(if_arg1_not_1, aml_or(a_cdw1, aml_int(0x08), a_cdw1));
- aml_append(if_uuid, if_arg1_not_1);
+ aml_append(else_nocompat, if_arg1_not_1);
if_caps_masked = aml_if(aml_lnot(aml_equal(aml_name("CDW3"), a_ctrl)));
/* Capability bits were masked */
aml_append(if_caps_masked, aml_or(a_cdw1, aml_int(0x10), a_cdw1));
- aml_append(if_uuid, if_caps_masked);
+ aml_append(else_nocompat, if_caps_masked);
- aml_append(if_uuid, aml_store(aml_name("CDW2"), aml_name("SUPP")));
- aml_append(if_uuid, aml_store(aml_name("CDW3"), aml_name("CTRL")));
+ aml_append(else_nocompat, aml_store(aml_name("CDW2"), aml_name("SUPP")));
+ aml_append(else_nocompat, aml_store(aml_name("CDW3"), aml_name("CTRL")));
if_cxl = aml_if(aml_equal(
aml_arg(0), aml_touuid("68F2D50B-C469-4D8A-BD3D-941A103FD3FC")));
@@ -75,12 +96,13 @@ static Aml *__build_cxl_osc_method(void)
/* CXL 2.0 Port/Device Register access */
aml_append(if_cxl,
aml_or(aml_name("CDW5"), aml_int(0x1), aml_name("CDW5")));
- aml_append(if_uuid, if_cxl);
+ aml_append(else_nocompat, if_cxl);
/* Update DWORD3 (the return value) */
- aml_append(if_uuid, aml_store(a_ctrl, aml_name("CDW3")));
+ aml_append(else_nocompat, aml_store(a_ctrl, aml_name("CDW3")));
- aml_append(if_uuid, aml_return(aml_arg(3)));
+ aml_append(else_nocompat, aml_return(aml_arg(3)));
+ aml_append(if_uuid, else_nocompat);
aml_append(method, if_uuid);
else_uuid = aml_else();
@@ -88,7 +110,7 @@ static Aml *__build_cxl_osc_method(void)
/* unrecognized uuid */
aml_append(else_uuid,
aml_or(aml_name("CDW1"), aml_int(0x4), aml_name("CDW1")));
- aml_append(else_uuid, aml_return(aml_arg(3)));
+ aml_append(method, aml_return(aml_arg(3)));
aml_append(method, else_uuid);
return method;
--
2.29.2
- [RFC PATCH 18/25] hw/cxl/device: Add a memory device (8.2.8.5), (continued)
[RFC PATCH 19/25] hw/cxl/device: Implement MMIO HDM decoding (8.2.5.12), Ben Widawsky, 2020/11/11
[RFC PATCH 20/25] acpi/cxl: Add _OSC implementation (9.14.2), Ben Widawsky, 2020/11/11
[RFC PATCH 22/25] acpi/cxl: Create the CEDT (9.14.1), Ben Widawsky, 2020/11/11
[RFC PATCH 21/25] acpi/cxl: Introduce a compat-driver UUID for CXL _OSC,
Ben Widawsky <=
[RFC PATCH 23/25] Temp: acpi/cxl: Add ACPI0017 (CEDT awareness), Ben Widawsky, 2020/11/11
[RFC PATCH 25/25] qtest/cxl: Add very basic sanity tests, Ben Widawsky, 2020/11/11
[RFC PATCH 24/25] WIP: i386/cxl: Initialize a host bridge, Ben Widawsky, 2020/11/11
Re: [RFC PATCH 00/25] Introduce CXL 2.0 Emulation, Jonathan Cameron, 2020/11/16