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[RFC PATCH 12/25] acpi/pci: Consolidate host bridge setup
From: |
Ben Widawsky |
Subject: |
[RFC PATCH 12/25] acpi/pci: Consolidate host bridge setup |
Date: |
Tue, 10 Nov 2020 21:47:11 -0800 |
This cleanup will make it easier to add support for CXL to the mix.
Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
---
hw/i386/acpi-build.c | 31 +++++++++++++++++--------------
1 file changed, 17 insertions(+), 14 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 4f66642d88..99b3088c9e 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1486,6 +1486,20 @@ static void build_smb0(Aml *table, I2CBus *smbus, int
devnr, int func)
aml_append(table, scope);
}
+enum { PCI, PCIE };
+static void init_pci_acpi(Aml *dev, int uid, int type)
+{
+ if (type == PCI) {
+ aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A03")));
+ aml_append(dev, aml_name_decl("_UID", aml_int(uid)));
+ } else {
+ aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A08")));
+ aml_append(dev, aml_name_decl("_CID", aml_eisaid("PNP0A03")));
+ aml_append(dev, aml_name_decl("_UID", aml_int(uid)));
+ aml_append(dev, build_q35_osc_method());
+ }
+}
+
static void
build_dsdt(GArray *table_data, BIOSLinker *linker,
AcpiPmInfo *pm, AcpiMiscInfo *misc,
@@ -1514,9 +1528,8 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
if (misc->is_piix4) {
sb_scope = aml_scope("_SB");
dev = aml_device("PCI0");
- aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A03")));
+ init_pci_acpi(dev, 0, PCI);
aml_append(dev, aml_name_decl("_ADR", aml_int(0)));
- aml_append(dev, aml_name_decl("_UID", aml_int(0)));
aml_append(sb_scope, dev);
aml_append(dsdt, sb_scope);
@@ -1530,11 +1543,8 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
} else {
sb_scope = aml_scope("_SB");
dev = aml_device("PCI0");
- aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A08")));
- aml_append(dev, aml_name_decl("_CID", aml_eisaid("PNP0A03")));
+ init_pci_acpi(dev, 0, PCIE);
aml_append(dev, aml_name_decl("_ADR", aml_int(0)));
- aml_append(dev, aml_name_decl("_UID", aml_int(0)));
- aml_append(dev, build_q35_osc_method());
aml_append(sb_scope, dev);
if (pm->smi_on_cpuhp) {
@@ -1636,15 +1646,8 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
scope = aml_scope("\\_SB");
dev = aml_device("PC%.02X", bus_num);
- aml_append(dev, aml_name_decl("_UID", aml_int(bus_num)));
aml_append(dev, aml_name_decl("_BBN", aml_int(bus_num)));
- if (pci_bus_is_express(bus)) {
- aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A08")));
- aml_append(dev, aml_name_decl("_CID", aml_eisaid("PNP0A03")));
- aml_append(dev, build_q35_osc_method());
- } else {
- aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A03")));
- }
+ init_pci_acpi(dev, bus_num, pci_bus_is_express(bus) ? PCIE : PCI);
if (numa_node != NUMA_NODE_UNASSIGNED) {
aml_append(dev, aml_name_decl("_PXM", aml_int(numa_node)));
--
2.29.2
[RFC PATCH 12/25] acpi/pci: Consolidate host bridge setup,
Ben Widawsky <=
[RFC PATCH 13/25] hw/pci: Plumb _UID through host bridges, Ben Widawsky, 2020/11/11
[RFC PATCH 14/25] hw/cxl/component: Implement host bridge MMIO (8.2.5, table 142), Ben Widawsky, 2020/11/11
[RFC PATCH 15/25] acpi/pxb/cxl: Reserve host bridge MMIO, Ben Widawsky, 2020/11/11
[RFC PATCH 16/25] hw/pxb/cxl: Add "windows" for host bridges, Ben Widawsky, 2020/11/11
[RFC PATCH 17/25] hw/cxl/rp: Add a root port, Ben Widawsky, 2020/11/11