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[PATCH v2 16/19] tcg/i386: Support split-rwx code generation
From: |
Richard Henderson |
Subject: |
[PATCH v2 16/19] tcg/i386: Support split-rwx code generation |
Date: |
Thu, 29 Oct 2020 17:49:18 -0700 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/i386/tcg-target.h | 2 +-
tcg/i386/tcg-target.c.inc | 20 +++++++++++---------
2 files changed, 12 insertions(+), 10 deletions(-)
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
index 1b9d41bd56..bbbd1c2d4a 100644
--- a/tcg/i386/tcg-target.h
+++ b/tcg/i386/tcg-target.h
@@ -236,6 +236,6 @@ static inline void tb_target_set_jmp_target(uintptr_t
tc_ptr, uintptr_t jmp_rx,
#define TCG_TARGET_NEED_LDST_LABELS
#endif
#define TCG_TARGET_NEED_POOL_LABELS
-#define TCG_TARGET_SUPPORT_MIRROR 0
+#define TCG_TARGET_SUPPORT_MIRROR 1
#endif
diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc
index 7f74c77d7f..e2c85381cd 100644
--- a/tcg/i386/tcg-target.c.inc
+++ b/tcg/i386/tcg-target.c.inc
@@ -165,7 +165,7 @@ static bool have_lzcnt;
# define have_lzcnt 0
#endif
-static tcg_insn_unit *tb_ret_addr;
+static const tcg_insn_unit *tb_ret_addr;
static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
intptr_t value, intptr_t addend)
@@ -173,7 +173,7 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
value += addend;
switch(type) {
case R_386_PC32:
- value -= (uintptr_t)code_ptr;
+ value -= (uintptr_t)tcg_mirror_rw_to_rx(code_ptr);
if (value != (int32_t)value) {
return false;
}
@@ -182,7 +182,7 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
tcg_patch32(code_ptr, value);
break;
case R_386_PC8:
- value -= (uintptr_t)code_ptr;
+ value -= (uintptr_t)tcg_mirror_rw_to_rx(code_ptr);
if (value != (int8_t)value) {
return false;
}
@@ -1006,7 +1006,7 @@ static void tcg_out_movi(TCGContext *s, TCGType type,
}
/* Try a 7 byte pc-relative lea before the 10 byte movq. */
- diff = arg - ((uintptr_t)s->code_ptr + 7);
+ diff = tcg_pcrel_diff(s, (const void *)arg) - 7;
if (diff == (int32_t)diff) {
tcg_out_opc(s, OPC_LEA | P_REXW, ret, 0, 0);
tcg_out8(s, (LOWREGMASK(ret) << 3) | 5);
@@ -1615,7 +1615,7 @@ static inline void tcg_out_call(TCGContext *s, const
tcg_insn_unit *dest)
tcg_out_branch(s, 1, dest);
}
-static void tcg_out_jmp(TCGContext *s, tcg_insn_unit *dest)
+static void tcg_out_jmp(TCGContext *s, const tcg_insn_unit *dest)
{
tcg_out_branch(s, 0, dest);
}
@@ -1786,7 +1786,8 @@ static void add_qemu_ldst_label(TCGContext *s, bool
is_ld, bool is_64,
label->datahi_reg = datahi;
label->addrlo_reg = addrlo;
label->addrhi_reg = addrhi;
- label->raddr = raddr;
+ /* TODO: Cast goes away when all hosts converted */
+ label->raddr = (void *)tcg_mirror_rw_to_rx(raddr);
label->label_ptr[0] = label_ptr[0];
if (TARGET_LONG_BITS > TCG_TARGET_REG_BITS) {
label->label_ptr[1] = label_ptr[1];
@@ -2280,7 +2281,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode
opc,
/* jump displacement must be aligned for atomic patching;
* see if we need to add extra nops before jump
*/
- gap = tcg_pcrel_diff(s, QEMU_ALIGN_PTR_UP(s->code_ptr + 1, 4));
+ gap = QEMU_ALIGN_PTR_UP(s->code_ptr + 1, 4) - s->code_ptr;
if (gap != 1) {
tcg_out_nopn(s, gap - 1);
}
@@ -3825,11 +3826,12 @@ static void tcg_target_qemu_prologue(TCGContext *s)
* Return path for goto_ptr. Set return value to 0, a-la exit_tb,
* and fall through to the rest of the epilogue.
*/
- tcg_code_gen_epilogue = s->code_ptr;
+ /* TODO: Cast goes away when all hosts converted */
+ tcg_code_gen_epilogue = (void *)tcg_mirror_rw_to_rx(s->code_ptr);
tcg_out_movi(s, TCG_TYPE_REG, TCG_REG_EAX, 0);
/* TB epilogue */
- tb_ret_addr = s->code_ptr;
+ tb_ret_addr = tcg_mirror_rw_to_rx(s->code_ptr);
tcg_out_addi(s, TCG_REG_CALL_STACK, stack_addend);
--
2.25.1
- [PATCH v2 02/19] tcg: Move tcg prologue pointer out of TCGContext, (continued)
- [PATCH v2 02/19] tcg: Move tcg prologue pointer out of TCGContext, Richard Henderson, 2020/10/29
- [PATCH v2 04/19] tcg: Introduce tcg_mirror_rw_to_rx/tcg_mirror_rx_to_rw, Richard Henderson, 2020/10/29
- [PATCH v2 10/19] tcg: Make tb arg to synchronize_from_tb const, Richard Henderson, 2020/10/29
- [PATCH v2 11/19] tcg: Use Error with alloc_code_gen_buffer, Richard Henderson, 2020/10/29
- [PATCH v2 12/19] tcg: Add --accel tcg,split-rwx property, Richard Henderson, 2020/10/29
- [PATCH v2 14/19] RFC: accel/tcg: Support split-rwx for darwin/iOS with vm_remap, Richard Henderson, 2020/10/29
- [PATCH v2 15/19] tcg: Return the rx mirror of TranslationBlock from exit_tb, Richard Henderson, 2020/10/29
- [PATCH v2 17/19] tcg/aarch64: Use B not BL for tcg_out_goto_long, Richard Henderson, 2020/10/29
- [PATCH v2 07/19] tcg: Adjust tcg_register_jit for const, Richard Henderson, 2020/10/29
- [PATCH v2 13/19] accel/tcg: Support split-rwx for linux with memfd, Richard Henderson, 2020/10/29
- [PATCH v2 16/19] tcg/i386: Support split-rwx code generation,
Richard Henderson <=
- [PATCH v2 19/19] tcg/aarch64: Support split-rwx code generation, Richard Henderson, 2020/10/29
- [PATCH v2 18/19] tcg/aarch64: Implement flush_idcache_range manually, Richard Henderson, 2020/10/29
- Re: [PATCH v2 00/19] Mirror map JIT memory for TCG, no-reply, 2020/10/29
- Re: [PATCH v2 00/19] Mirror map JIT memory for TCG, Paolo Bonzini, 2020/10/30