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Re: [PATCH v2 3/5] target/riscv: Remove the HS_TWO_STAGE flag
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From: |
Richard Henderson |
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Subject: |
Re: [PATCH v2 3/5] target/riscv: Remove the HS_TWO_STAGE flag |
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Date: |
Wed, 28 Oct 2020 08:11:29 -0700 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 |
On 10/28/20 7:42 AM, Alistair Francis wrote:
> @@ -337,7 +324,8 @@ static int get_physical_address(CPURISCVState *env,
> hwaddr *physical,
> * was called. Background registers will be used if the guest has
> * forced a two stage translation to be on (in HS or M mode).
> */
> - if (riscv_cpu_two_stage_lookup(env) && access_type != MMU_INST_FETCH) {
> + if ((!riscv_cpu_virt_enabled(env) && riscv_cpu_two_stage_lookup(mmu_idx))
> + && access_type != MMU_INST_FETCH) {
This access_type check looks like a bug. And possibly why you said that you
can't use code access for the execute load helpers.
Otherwise,
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
- [PATCH v2 0/5] Fix the Hypervisor access functions, Alistair Francis, 2020/10/28
- [PATCH v2 1/5] target/riscv: Add a virtualised MMU Mode, Alistair Francis, 2020/10/28
- [PATCH v2 2/5] target/riscv: Set the virtualised MMU mode when doing hyp accesses, Alistair Francis, 2020/10/28
- [PATCH v2 3/5] target/riscv: Remove the HS_TWO_STAGE flag, Alistair Francis, 2020/10/28
- Re: [PATCH v2 3/5] target/riscv: Remove the HS_TWO_STAGE flag,
Richard Henderson <=
- [PATCH v2 4/5] target/riscv: Remove the hyp load and store functions, Alistair Francis, 2020/10/28
- [PATCH v2 5/5] target/riscv: Split the Hypervisor execute load helpers, Alistair Francis, 2020/10/28