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[PATCH v3 11/20] target/mips/cpu: Allow the CPU to use dynamic frequenci
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH v3 11/20] target/mips/cpu: Allow the CPU to use dynamic frequencies |
Date: |
Sat, 10 Oct 2020 22:43:10 +0200 |
Use the Clock API and let the CPU object have an input clock.
If no clock is connected, keep using the default frequency of
200 MHz used since the introduction of the 'r4k' machine in
commit 6af0bf9c7c3.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/mips/cpu.h | 4 ++++
target/mips/cpu.c | 10 ++++++++--
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index baeceb892ef..062a4ba6225 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -4,6 +4,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
#include "fpu/softfloat-types.h"
+#include "hw/clock.h"
#include "mips-defs.h"
#define TCG_GUEST_DEFAULT_MO (0)
@@ -1151,6 +1152,8 @@ struct CPUMIPSState {
/**
* MIPSCPU:
* @env: #CPUMIPSState
+ * @clock: this CPU input clock (may be connected
+ * to an output clock from another device).
* @cp0_count_rate: rate at which the coprocessor 0 counter increments
*
* A MIPS CPU.
@@ -1160,6 +1163,7 @@ struct MIPSCPU {
CPUState parent_obj;
/*< public >*/
+ Clock *clock;
CPUNegativeOffsetState neg;
CPUMIPSState env;
/*
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index 461edfe22b7..3deb0245e7c 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -27,6 +27,7 @@
#include "sysemu/kvm.h"
#include "exec/exec-all.h"
#include "hw/qdev-properties.h"
+#include "hw/qdev-clock.h"
static void mips_cpu_set_pc(CPUState *cs, vaddr value)
{
@@ -144,8 +145,8 @@ static void mips_cp0_period_set(MIPSCPU *cpu)
{
CPUMIPSState *env = &cpu->env;
- env->cp0_count_ns = muldiv64(NANOSECONDS_PER_SECOND, cpu->cp0_count_rate,
- CPU_FREQ_HZ_DEFAULT);
+ env->cp0_count_ns = cpu->cp0_count_rate
+ * clock_get_ns(MIPS_CPU(cpu)->clock);
}
static void mips_cpu_realizefn(DeviceState *dev, Error **errp)
@@ -155,6 +156,10 @@ static void mips_cpu_realizefn(DeviceState *dev, Error
**errp)
MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(dev);
Error *local_err = NULL;
+ if (!clock_get(cpu->clock)) {
+ /* Initialize the frequency in case the clock remains unconnected. */
+ clock_set_hz(cpu->clock, CPU_FREQ_HZ_DEFAULT);
+ }
mips_cp0_period_set(cpu);
cpu_exec_realizefn(cs, &local_err);
@@ -178,6 +183,7 @@ static void mips_cpu_initfn(Object *obj)
MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(obj);
cpu_set_cpustate_pointers(cpu);
+ cpu->clock = qdev_init_clock_in(DEVICE(obj), "clk-in", NULL, cpu);
env->cpu_model = mcc->cpu_def;
}
--
2.26.2
- [PATCH v3 04/20] hw/core/clock: add the clock_new helper function, (continued)
- [PATCH v3 04/20] hw/core/clock: add the clock_new helper function, Philippe Mathieu-Daudé, 2020/10/10
- [PATCH v3 06/20] target/mips/cp0_timer: Explicit unit in variable name, Philippe Mathieu-Daudé, 2020/10/10
- [PATCH v3 08/20] target/mips: Move cp0_count_ns to CPUMIPSState, Philippe Mathieu-Daudé, 2020/10/10
- [PATCH v3 05/20] target/mips: Move cpu_mips_get_random() with CP0 helpers, Philippe Mathieu-Daudé, 2020/10/10
- [PATCH v3 07/20] target/mips/cp0_timer: Document TIMER_PERIOD origin, Philippe Mathieu-Daudé, 2020/10/10
- [PATCH v3 09/20] target/mips/cpu: Calculate the CP0 timer period using the CPU frequency, Philippe Mathieu-Daudé, 2020/10/10
- [PATCH v3 10/20] target/mips/cpu: Make cp0_count_rate a property, Philippe Mathieu-Daudé, 2020/10/10
- [PATCH v3 11/20] target/mips/cpu: Allow the CPU to use dynamic frequencies,
Philippe Mathieu-Daudé <=
- [PATCH v3 12/20] hw/mips/r4k: Explicit CPU frequency is 200 MHz, Philippe Mathieu-Daudé, 2020/10/10
- [PATCH v3 14/20] hw/mips/mipssim: Correct CPU frequency, Philippe Mathieu-Daudé, 2020/10/10
- [PATCH v3 18/20] hw/mips/malta: Set CPU frequency to 320 MHz, Philippe Mathieu-Daudé, 2020/10/10
- [PATCH v3 20/20] target/mips/cpu: Display warning when CPU is used without input clock, Philippe Mathieu-Daudé, 2020/10/10
- [PATCH v3 17/20] hw/mips/boston: Set CPU frequency to 1 GHz, Philippe Mathieu-Daudé, 2020/10/10
- [PATCH v3 13/20] hw/mips/fuloong2e: Set CPU frequency to 533 MHz, Philippe Mathieu-Daudé, 2020/10/10