RE: [PATCH 1/5] target/riscv: Add basic vmstate description of CPU

[Jiangyifei]

> -----Original Message-----
> From: Richard Henderson [mailto:richard.henderson@linaro.org]
> Sent: Friday, October 2, 2020 1:23 AM
> To: Jiangyifei <jiangyifei@huawei.com>; qemu-devel@nongnu.org;
> qemu-riscv@nongnu.org
> Cc: Zhanghailiang <zhang.zhanghailiang@huawei.com>;
> sagark@eecs.berkeley.edu; kbastian@mail.uni-paderborn.de; Zhangxiaofeng
> (F) <victor.zhangxiaofeng@huawei.com>; Alistair.Francis@wdc.com; yinyipeng
> <yinyipeng1@huawei.com>; palmer@dabbelt.com; Wubin (H)
> <wu.wubin@huawei.com>; dengkai (A) <dengkai1@huawei.com>
> Subject: Re: [PATCH 1/5] target/riscv: Add basic vmstate description of CPU
> 
> On 9/28/20 9:03 PM, Yifei Jiang wrote:
> > --- /dev/null
> > +++ b/target/riscv/machine.c
> > @@ -0,0 +1,59 @@
> > +#include "qemu/osdep.h"
> > +#include "cpu.h"
> 
> All new files must contain license boilerplate.
> 
> Otherwise, considering the followups, this seems ok.
> 

Thanks, I'll add license boilerplate in the next series.

Yifei

> 
> r~