[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH 07/16] hw/mips/r4k: Explicit CPU frequency is 200 MHz
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH 07/16] hw/mips/r4k: Explicit CPU frequency is 200 MHz |
Date: |
Mon, 28 Sep 2020 19:15:30 +0200 |
Since its introduction in commit 6af0bf9c7c3,
the 'r4k' machine runs at 200 MHz.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/mips/r4k.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/hw/mips/r4k.c b/hw/mips/r4k.c
index 3487013a4a1..2aa18203f20 100644
--- a/hw/mips/r4k.c
+++ b/hw/mips/r4k.c
@@ -37,6 +37,7 @@
#include "sysemu/reset.h"
#include "sysemu/runstate.h"
#include "qemu/error-report.h"
+#include "hw/qdev-clock.h"
#define MAX_IDE_BUS 2
@@ -184,6 +185,7 @@ void mips_r4k_init(MachineState *machine)
int bios_size;
MIPSCPU *cpu;
CPUMIPSState *env;
+ Clock *cpuclk;
ResetData *reset_info;
int i;
qemu_irq *i8259;
@@ -193,7 +195,11 @@ void mips_r4k_init(MachineState *machine)
int be;
/* init CPUs */
- cpu = MIPS_CPU(cpu_create(machine->cpu_type));
+ cpu = MIPS_CPU(object_new(machine->cpu_type));
+ cpuclk = qdev_init_clock_out(DEVICE(cpu), "cpuclk");
+ clock_set_hz(cpuclk, 200000000); /* 200 MHz */
+ qdev_connect_clock_in(DEVICE(cpu), "clk", cpuclk);
+ qdev_realize(DEVICE(cpu), NULL, &error_abort);
env = &cpu->env;
reset_info = g_malloc0(sizeof(ResetData));
--
2.26.2
- [PATCH 00/16] hw/mips: Set CPU frequency, Philippe Mathieu-Daudé, 2020/09/28
- [PATCH 05/16] target/mips/cpu: Set default CPU frequency to 200 MHz, Philippe Mathieu-Daudé, 2020/09/28
- [PATCH 04/16] target/mips/cpu: Introduce mips_cpu_properties[], Philippe Mathieu-Daudé, 2020/09/28
- [PATCH 01/16] hw/core/cpu: Let CPU object have a clock source, Philippe Mathieu-Daudé, 2020/09/28
- [PATCH 09/16] hw/mips/mipssim: Correct CPU frequency, Philippe Mathieu-Daudé, 2020/09/28
- [PATCH 02/16] target/mips: Move cpu_mips_get_random() with CP0 helpers, Philippe Mathieu-Daudé, 2020/09/28
- [PATCH 03/16] target/mips/cp0_timer: Explicit unit in variable name, Philippe Mathieu-Daudé, 2020/09/28
- [PATCH 08/16] hw/mips/fuloong2e: Set CPU frequency to 533 MHz, Philippe Mathieu-Daudé, 2020/09/28
- [PATCH 06/16] target/mips: Keep CP0 counter in sync with the CPU frequency, Philippe Mathieu-Daudé, 2020/09/28
- [PATCH 07/16] hw/mips/r4k: Explicit CPU frequency is 200 MHz,
Philippe Mathieu-Daudé <=
- [PATCH 12/16] hw/mips/boston: Set CPU frequency to 1 GHz, Philippe Mathieu-Daudé, 2020/09/28
- [PATCH 13/16] hw/mips/malta: Set CPU frequency to 320 MHz, Philippe Mathieu-Daudé, 2020/09/28
- [PATCH 10/16] hw/mips/jazz: Correct CPU frequencies, Philippe Mathieu-Daudé, 2020/09/28
- [PATCH 11/16] hw/mips/cps: Expose input clock and connect it to CPU cores, Philippe Mathieu-Daudé, 2020/09/28
- [PATCH 14/16] hw/mips/cps: Do not allow use without input clock, Philippe Mathieu-Daudé, 2020/09/28
- [PATCH 15/16] target/mips/cpu: Do not allow system-mode use without input clock, Philippe Mathieu-Daudé, 2020/09/28
- [PATCH 16/16] tests/acceptance: Test the MIPSsim machine, Philippe Mathieu-Daudé, 2020/09/28