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[PATCH v3 01/81] target/arm: Fix sve_uzp_p vs odd vector lengths
From: |
Richard Henderson |
Subject: |
[PATCH v3 01/81] target/arm: Fix sve_uzp_p vs odd vector lengths |
Date: |
Fri, 18 Sep 2020 11:36:31 -0700 |
Missed out on compressing the second half of a predicate
with length vl % 512 > 256.
Adjust all of the x + (y << s) to x | (y << s) as a
general style fix. Drop the extract64 because the input
uint64_t are known to be already zero-extended from the
current size of the predicate.
Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/sve_helper.c | 30 +++++++++++++++++++++---------
1 file changed, 21 insertions(+), 9 deletions(-)
diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c
index 4758d46f34..fcb46f150f 100644
--- a/target/arm/sve_helper.c
+++ b/target/arm/sve_helper.c
@@ -1938,7 +1938,7 @@ void HELPER(sve_uzp_p)(void *vd, void *vn, void *vm,
uint32_t pred_desc)
if (oprsz <= 8) {
l = compress_bits(n[0] >> odd, esz);
h = compress_bits(m[0] >> odd, esz);
- d[0] = extract64(l + (h << (4 * oprsz)), 0, 8 * oprsz);
+ d[0] = l | (h << (4 * oprsz));
} else {
ARMPredicateReg tmp_m;
intptr_t oprsz_16 = oprsz / 16;
@@ -1952,23 +1952,35 @@ void HELPER(sve_uzp_p)(void *vd, void *vn, void *vm,
uint32_t pred_desc)
h = n[2 * i + 1];
l = compress_bits(l >> odd, esz);
h = compress_bits(h >> odd, esz);
- d[i] = l + (h << 32);
+ d[i] = l | (h << 32);
}
- /* For VL which is not a power of 2, the results from M do not
- align nicely with the uint64_t for D. Put the aligned results
- from M into TMP_M and then copy it into place afterward. */
+ /*
+ * For VL which is not a multiple of 512, the results from M do not
+ * align nicely with the uint64_t for D. Put the aligned results
+ * from M into TMP_M and then copy it into place afterward.
+ */
if (oprsz & 15) {
- d[i] = compress_bits(n[2 * i] >> odd, esz);
+ int final_shift = (oprsz & 15) * 2;
+
+ l = n[2 * i + 0];
+ h = n[2 * i + 1];
+ l = compress_bits(l >> odd, esz);
+ h = compress_bits(h >> odd, esz);
+ d[i] = l | (h << final_shift);
for (i = 0; i < oprsz_16; i++) {
l = m[2 * i + 0];
h = m[2 * i + 1];
l = compress_bits(l >> odd, esz);
h = compress_bits(h >> odd, esz);
- tmp_m.p[i] = l + (h << 32);
+ tmp_m.p[i] = l | (h << 32);
}
- tmp_m.p[i] = compress_bits(m[2 * i] >> odd, esz);
+ l = m[2 * i + 0];
+ h = m[2 * i + 1];
+ l = compress_bits(l >> odd, esz);
+ h = compress_bits(h >> odd, esz);
+ tmp_m.p[i] = l | (h << final_shift);
swap_memmove(vd + oprsz / 2, &tmp_m, oprsz / 2);
} else {
@@ -1977,7 +1989,7 @@ void HELPER(sve_uzp_p)(void *vd, void *vn, void *vm,
uint32_t pred_desc)
h = m[2 * i + 1];
l = compress_bits(l >> odd, esz);
h = compress_bits(h >> odd, esz);
- d[oprsz_16 + i] = l + (h << 32);
+ d[oprsz_16 + i] = l | (h << 32);
}
}
}
--
2.25.1
- [PATCH v3 00/81] target/arm: Implement SVE2, Richard Henderson, 2020/09/18
- [PATCH v3 01/81] target/arm: Fix sve_uzp_p vs odd vector lengths,
Richard Henderson <=
- [PATCH v3 02/81] target/arm: Fix sve_zip_p vs odd vector lengths, Richard Henderson, 2020/09/18
- [PATCH v3 03/81] target/arm: Fix sve_punpk_p vs odd vector lengths, Richard Henderson, 2020/09/18
- [PATCH v3 04/81] target/arm: Add ID_AA64ZFR0 fields and isar_feature_aa64_sve2, Richard Henderson, 2020/09/18
- [PATCH v3 06/81] target/arm: Implement SVE2 integer pairwise add and accumulate long, Richard Henderson, 2020/09/18
- [PATCH v3 05/81] target/arm: Implement SVE2 Integer Multiply - Unpredicated, Richard Henderson, 2020/09/18
- [PATCH v3 07/81] target/arm: Implement SVE2 integer unary operations (predicated), Richard Henderson, 2020/09/18
- [PATCH v3 08/81] target/arm: Split out saturating/rounding shifts from neon, Richard Henderson, 2020/09/18
- [PATCH v3 11/81] target/arm: Implement SVE2 integer pairwise arithmetic, Richard Henderson, 2020/09/18
- [PATCH v3 09/81] target/arm: Implement SVE2 saturating/rounding bitwise shift left (predicated), Richard Henderson, 2020/09/18
- [PATCH v3 10/81] target/arm: Implement SVE2 integer halving add/subtract (predicated), Richard Henderson, 2020/09/18