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[RFC v2 03/10] target/arm: only set ID_PFR1_EL1.GIC for AArch32 guest
From: |
Peng Liang |
Subject: |
[RFC v2 03/10] target/arm: only set ID_PFR1_EL1.GIC for AArch32 guest |
Date: |
Thu, 17 Sep 2020 20:14:42 +0800 |
Some AArch64 CPU doesn't support AArch32 mode, AArch32 registers should
be 0.
Signed-off-by: zhanghailiang <zhang.zhanghailiang@huawei.com>
Signed-off-by: Peng Liang <liangpeng10@huawei.com>
---
target/arm/helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 88bd9dd35da8..3a48bc4e4809 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6627,7 +6627,7 @@ static uint64_t id_pfr1_read(CPUARMState *env, const
ARMCPRegInfo *ri)
ARMCPU *cpu = env_archcpu(env);
uint64_t pfr1 = cpu->id_pfr1;
- if (env->gicv3state) {
+ if (!arm_feature(&cpu->env, ARM_FEATURE_AARCH64) && env->gicv3state) {
pfr1 |= 1 << 28;
}
return pfr1;
--
2.26.2
- [RFC v2 00/10] Support disable/enable CPU features for AArch64, Peng Liang, 2020/09/17
- [RFC v2 01/10] linux-header: Introduce KVM_CAP_ARM_CPU_FEATURE, Peng Liang, 2020/09/17
- [RFC v2 03/10] target/arm: only set ID_PFR1_EL1.GIC for AArch32 guest,
Peng Liang <=
- [RFC v2 02/10] target/arm: Update ID fields, Peng Liang, 2020/09/17
- [RFC v2 04/10] target/arm: convert isar regs to array, Peng Liang, 2020/09/17
- [RFC v2 05/10] target/arm: Introduce kvm_arm_cpu_feature_supported, Peng Liang, 2020/09/17
- [RFC v2 07/10] target/arm: Allow ID registers to synchronize to KVM, Peng Liang, 2020/09/17
- [RFC v2 08/10] target/arm: Introduce user_mask to indicate whether the feature is set explicitly, Peng Liang, 2020/09/17
- [RFC v2 10/10] target/arm: Add CPU features to query-cpu-model-expansion, Peng Liang, 2020/09/17
- [RFC v2 06/10] target/arm: register CPU features for property, Peng Liang, 2020/09/17
- [RFC v2 09/10] target/arm: introduce CPU feature dependency mechanism, Peng Liang, 2020/09/17