Re: [RFC v4 24/70] target/riscv: rvv-1.0: update vext_max_elems() for load/store insns

[Richard Henderson]

On 8/17/20 1:49 AM, frank.chang@sifive.com wrote:
> +static uint8_t vext_get_emul(DisasContext *s, uint8_t eew)
> +{
> +    int8_t emul = ctzl(eew) - (s->sew + 3) + s->lmul;
> +    return emul < 0 ? 0 : emul;
> +}

Same comment about EEW being encoded as MemOp to match SEW.


r~