[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[RFC v3 16/71] target/riscv: add fp16 nan-box check generator function
|
From: |
frank . chang |
|
Subject: |
[RFC v3 16/71] target/riscv: add fp16 nan-box check generator function |
|
Date: |
Thu, 6 Aug 2020 18:46:13 +0800 |
From: Frank Chang <frank.chang@sifive.com>
If a 16-bit input is not properly nanboxed, then the input is replaced
with the default qnan.
Signed-off-by: Frank Chang <frank.chang@sifive.com>
---
target/riscv/translate.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index 24026f901d1..95921296a56 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -110,6 +110,16 @@ static void gen_nanbox_s(TCGv_i64 out, TCGv_i64 in)
*
* Here, the result is always nan-boxed, even the canonical nan.
*/
+static void gen_check_nanbox_h(TCGv_i64 out, TCGv_i64 in)
+{
+ TCGv_i64 t_max = tcg_const_i64(0xffffffffffff0000ull);
+ TCGv_i64 t_nan = tcg_const_i64(0xffffffffffff7e00ull);
+
+ tcg_gen_movcond_i64(TCG_COND_GEU, out, in, t_max, in, t_nan);
+ tcg_temp_free_i64(t_max);
+ tcg_temp_free_i64(t_nan);
+}
+
static void gen_check_nanbox_s(TCGv_i64 out, TCGv_i64 in)
{
TCGv_i64 t_max = tcg_const_i64(0xffffffff00000000ull);
--
2.17.1
- [RFC v3 10/71] target/riscv: rvv-1.0: check MSTATUS_VS when accessing vector csr registers, (continued)
- [RFC v3 10/71] target/riscv: rvv-1.0: check MSTATUS_VS when accessing vector csr registers, frank . chang, 2020/08/06
- [RFC v3 11/71] target/riscv: rvv-1.0: remove MLEN calculations, frank . chang, 2020/08/06
- [RFC v3 12/71] target/riscv: rvv-1.0: add fractional LMUL, frank . chang, 2020/08/06
- [RFC v3 13/71] target/riscv: rvv-1.0: add VMA and VTA, frank . chang, 2020/08/06
- [RFC v3 15/71] target/riscv: introduce more imm value modes in translator functions, frank . chang, 2020/08/06
- [RFC v3 16/71] target/riscv: add fp16 nan-box check generator function,
frank . chang <=
- [RFC v3 14/71] target/riscv: rvv-1.0: update check functions, frank . chang, 2020/08/06
- [RFC v3 17/71] target/riscv: rvv:1.0: add translation-time nan-box helper function, frank . chang, 2020/08/06
- [RFC v3 19/71] target/riscv: rvv-1.0: configure instructions, frank . chang, 2020/08/06
- [RFC v3 18/71] target/riscv: rvv-1.0: apply nanbox helper in opfvf_trans, frank . chang, 2020/08/06
- [RFC v3 20/71] target/riscv: rvv-1.0: stride load and store instructions, frank . chang, 2020/08/06
- [RFC v3 22/71] target/riscv: rvv-1.0: fix address index overflow bug of indexed load/store insns, frank . chang, 2020/08/06