qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [RFC v2 56/76] target/riscv: rvv-0.9: widening integer reduction ins


From: Richard Henderson
Subject: Re: [RFC v2 56/76] target/riscv: rvv-0.9: widening integer reduction instructions
Date: Fri, 31 Jul 2020 08:13:55 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0

On 7/22/20 2:16 AM, frank.chang@sifive.com wrote:
>  /* Vector Widening Integer Reduction Instructions */
>  /* signed sum reduction into double-width accumulator */
> -GEN_VEXT_RED(vwredsum_vs_b, int16_t, int8_t, H2, H1, DO_ADD, clearh)
> -GEN_VEXT_RED(vwredsum_vs_h, int32_t, int16_t, H4, H2, DO_ADD, clearl)
> -GEN_VEXT_RED(vwredsum_vs_w, int64_t, int32_t, H8, H4, DO_ADD, clearq)
> +GEN_VEXT_RED(vwredsum_vs_b, int16_t, int8_t,  H2, H1, DO_ADD)
> +GEN_VEXT_RED(vwredsum_vs_h, int32_t, int16_t, H4, H2, DO_ADD)
> +GEN_VEXT_RED(vwredsum_vs_w, int64_t, int32_t, H8, H4, DO_ADD)

This patch can't be split from the previous, because it won't compile.  I'm not
quite sure where we are here with whether the patch is actually required or
not, with respect to VTA.


r~



reply via email to

[Prev in Thread] Current Thread [Next in Thread]