Re: [PATCH 1/4] hw/hppa: Sync hppa_hardware.h file with SeaBIOS sources

[Philippe Mathieu-Daudé]

On 7/27/20 11:46 PM, Helge Deller wrote:
> The hppa_hardware.h file is shared with SeaBIOS. Sync it.
> 
> Signed-off-by: Helge Deller <deller@gmx.de>
> ---
>  hw/hppa/hppa_hardware.h | 6 ++++++
>  hw/hppa/lasi.c          | 2 --
>  2 files changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/hw/hppa/hppa_hardware.h b/hw/hppa/hppa_hardware.h
> index 4a2fe2df60..cdb7fa6240 100644
> --- a/hw/hppa/hppa_hardware.h
> +++ b/hw/hppa/hppa_hardware.h
> @@ -17,6 +17,7 @@
>  #define LASI_UART_HPA   0xffd05000
>  #define LASI_SCSI_HPA   0xffd06000
>  #define LASI_LAN_HPA    0xffd07000
> +#define LASI_RTC_HPA    0xffd09000

I find the line you are removing cleaner:

-#define LASI_RTC_HPA    (LASI_HPA + 0x9000)

"Offset in the LASI memory region".

Anyway not a blocker.

Having these values sorted would help.

>  #define LASI_LPT_HPA    0xffd02000
>  #define LASI_AUDIO_HPA  0xffd04000
>  #define LASI_PS2KBD_HPA 0xffd08000
> @@ -37,10 +38,15 @@
>  #define PORT_PCI_CMD    (PCI_HPA + DINO_PCI_ADDR)
>  #define PORT_PCI_DATA   (PCI_HPA + DINO_CONFIG_DATA)
> 
> +/* QEMU fw_cfg interface port */
> +#define QEMU_FW_CFG_IO_BASE     (MEMORY_HPA + 0x80)
> +
>  #define PORT_SERIAL1    (DINO_UART_HPA + 0x800)
>  #define PORT_SERIAL2    (LASI_UART_HPA + 0x800)
> 
>  #define HPPA_MAX_CPUS   8       /* max. number of SMP CPUs */
>  #define CPU_CLOCK_MHZ   250     /* emulate a 250 MHz CPU */
> 
> +#define CPU_HPA_CR_REG  7       /* store CPU HPA in cr7 (SeaBIOS internal) */
> +
>  #endif
> diff --git a/hw/hppa/lasi.c b/hw/hppa/lasi.c
> index 19974034f3..ffcbb988b8 100644
> --- a/hw/hppa/lasi.c
> +++ b/hw/hppa/lasi.c
> @@ -54,8 +54,6 @@
>  #define LASI_CHIP(obj) \
>      OBJECT_CHECK(LasiState, (obj), TYPE_LASI_CHIP)
> 
> -#define LASI_RTC_HPA    (LASI_HPA + 0x9000)
> -
>  typedef struct LasiState {
>      PCIHostState parent_obj;
> 
> --
> 2.21.3
> 
>