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Re: [RFC PATCH 2/8] fpu/softfloat: use the similiar logic to recognize s


From: Richard Henderson
Subject: Re: [RFC PATCH 2/8] fpu/softfloat: use the similiar logic to recognize sNaN and qNaN
Date: Mon, 13 Jul 2020 12:17:42 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0

On 7/12/20 4:45 PM, LIU Zhiwei wrote:
> Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
> ---
>  fpu/softfloat-specialize.inc.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/fpu/softfloat-specialize.inc.c b/fpu/softfloat-specialize.inc.c
> index 034d18199c..6b778a7830 100644
> --- a/fpu/softfloat-specialize.inc.c
> +++ b/fpu/softfloat-specialize.inc.c
> @@ -292,7 +292,7 @@ bool float32_is_quiet_nan(float32 a_, float_status 
> *status)
>      if (snan_bit_is_one(status)) {
>          return (((a >> 22) & 0x1FF) == 0x1FE) && (a & 0x003FFFFF);
>      } else {
> -        return ((uint32_t)(a << 1) >= 0xFF800000);
> +        return ((a >> 22) & 0x1FF) == 0x1FF;
>      }
>  #endif
>  }

I don't see a reason for this.  The previous was a bug, but this isn't.


r~



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