[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[RFC 04/65] target/riscv: fix vill bit index in vtype register
From: |
frank . chang |
Subject: |
[RFC 04/65] target/riscv: fix vill bit index in vtype register |
Date: |
Fri, 10 Jul 2020 18:48:18 +0800 |
From: Frank Chang <frank.chang@sifive.com>
vill bit is at vtype[XLEN-1].
Signed-off-by: Frank Chang <frank.chang@sifive.com>
---
target/riscv/cpu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index eef20ca6e5..a804a5d0ba 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -98,7 +98,7 @@ FIELD(VTYPE, VLMUL, 0, 2)
FIELD(VTYPE, VSEW, 2, 3)
FIELD(VTYPE, VEDIV, 5, 2)
FIELD(VTYPE, RESERVED, 7, sizeof(target_ulong) * 8 - 9)
-FIELD(VTYPE, VILL, sizeof(target_ulong) * 8 - 2, 1)
+FIELD(VTYPE, VILL, sizeof(target_ulong) * 8 - 1, 1)
struct CPURISCVState {
target_ulong gpr[32];
--
2.17.1
- [RFC 30/65] target/riscv: rvv-0.9: floating-point scalar move instructions, (continued)
- [RFC 30/65] target/riscv: rvv-0.9: floating-point scalar move instructions, frank . chang, 2020/07/10
- [RFC 32/65] target/riscv: rvv-0.9: integer extension instructions, frank . chang, 2020/07/10
- [RFC 34/65] target/riscv: rvv-0.9: integer add-with-carry/subtract-with-borrow, frank . chang, 2020/07/10
- [RFC 37/65] target/riscv: rvv-0.9: quad-widening integer multiply-add instructions, frank . chang, 2020/07/10
- [RFC 46/65] target/riscv: rvv-0.9: slide instructions, frank . chang, 2020/07/10
- [RFC 47/65] target/riscv: rvv-0.9: floating-point slide instructions, frank . chang, 2020/07/10
- [RFC 52/65] target/riscv: rvv-0.9: widening floating-point reduction instructions, frank . chang, 2020/07/10
- [RFC 56/65] target/riscv: rvv-0.9: remove integer extract instruction, frank . chang, 2020/07/10
- [RFC 58/65] target/riscv: rvv-0.9: widening floating-point/integer type-convert, frank . chang, 2020/07/10
- [RFC 61/65] fpu: fix float16 nan check, frank . chang, 2020/07/10
- [RFC 04/65] target/riscv: fix vill bit index in vtype register,
frank . chang <=
- [RFC 22/65] target/riscv: rvv-0.9: floating-point square-root instruction, frank . chang, 2020/07/10
- [RFC 23/65] target/riscv: rvv-0.9: floating-point classify instructions, frank . chang, 2020/07/10
- [RFC 24/65] target/riscv: rvv-0.9: mask population count instruction, frank . chang, 2020/07/10
- [RFC 44/65] target/riscv: rvv-0.9: mask-register logical instructions, frank . chang, 2020/07/10
- [RFC 57/65] target/riscv: rvv-0.9: floating-point min/max instructions, frank . chang, 2020/07/10
- [RFC 54/65] target/riscv: rvv-0.9: remove widening saturating scaled multiply-add, frank . chang, 2020/07/10
- [RFC 59/65] target/riscv: rvv-0.9: narrowing floating-point/integer type-convert, frank . chang, 2020/07/10
- [RFC 60/65] softfloat: add fp16 and uint8/int8 interconvert functions, frank . chang, 2020/07/10