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[PULL 32/32] target/avr/disas: Fix store instructions display order
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 32/32] target/avr/disas: Fix store instructions display order |
Date: |
Tue, 7 Jul 2020 20:17:10 +0200 |
While LOAD instructions use the target register as first
argument, STORE instructions use it as second argument:
LD Rd, X // Rd <- (X)
ST Y, Rd // (Y) <- Rr
Reported-by: Joaquin de Andres <me@xcancerberox.com.ar>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20200707070021.10031-4-f4bug@amsat.org>
---
target/avr/disas.c | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/target/avr/disas.c b/target/avr/disas.c
index 8c11509ce8..70d65ea4b2 100644
--- a/target/avr/disas.c
+++ b/target/avr/disas.c
@@ -196,16 +196,16 @@ INSN(LDZ2, "r%d, Z+", a->rd)
INSN(LDZ3, "r%d, -Z", a->rd)
INSN(LDDY, "r%d, Y+%d", a->rd, a->imm)
INSN(LDDZ, "r%d, Z+%d", a->rd, a->imm)
-INSN(STS, "r%d, %d", a->rd, a->imm)
-INSN(STX1, "r%d, X", a->rr)
-INSN(STX2, "r%d, X+", a->rr)
-INSN(STX3, "r%d, -X", a->rr)
-INSN(STY2, "r%d, Y+", a->rd)
-INSN(STY3, "r%d, -Y", a->rd)
-INSN(STZ2, "r%d, Z+", a->rd)
-INSN(STZ3, "r%d, -Z", a->rd)
-INSN(STDY, "r%d, Y+%d", a->rd, a->imm)
-INSN(STDZ, "r%d, Z+%d", a->rd, a->imm)
+INSN(STS, "%d, r%d", a->imm, a->rd)
+INSN(STX1, "X, r%d", a->rr)
+INSN(STX2, "X+, r%d", a->rr)
+INSN(STX3, "-X, r%d", a->rr)
+INSN(STY2, "Y+, r%d", a->rd)
+INSN(STY3, "-Y, r%d", a->rd)
+INSN(STZ2, "Z+, r%d", a->rd)
+INSN(STZ3, "-Z, r%d", a->rd)
+INSN(STDY, "Y+%d, r%d", a->imm, a->rd)
+INSN(STDZ, "Z+%d, r%d", a->imm, a->rd)
INSN(LPM1, "")
INSN(LPM2, "r%d, Z", a->rd)
INSN(LPMX, "r%d, Z+", a->rd)
--
2.21.3
- [PULL 18/32] target/avr: Add support for disassembling via option '-d in_asm', (continued)
- [PULL 18/32] target/avr: Add support for disassembling via option '-d in_asm', Philippe Mathieu-Daudé, 2020/07/07
- [PULL 19/32] target/avr: Register AVR support with the rest of QEMU, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 20/32] tests/machine-none: Add AVR support, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 21/32] hw/char: avr: Add limited support for USART peripheral, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 22/32] hw/timer: avr: Add limited support for 16-bit timer peripheral, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 26/32] hw/avr: Add limited support for some Arduino boards, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 24/32] hw/avr: Add support for loading ELF/raw binaries, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 27/32] tests/boot-serial: Test some Arduino boards (AVR based), Philippe Mathieu-Daudé, 2020/07/07
- [PULL 23/32] hw/misc: avr: Add limited support for power reduction device, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 31/32] target/avr/cpu: Fix $PC displayed address, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 32/32] target/avr/disas: Fix store instructions display order,
Philippe Mathieu-Daudé <=
- [PULL 28/32] tests/acceptance: Test the Arduino MEGA2560 board, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 29/32] target/avr: Add section into QEMU documentation, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 25/32] hw/avr: Add some ATmega microcontrollers, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 30/32] target/avr/cpu: Drop tlb_flush() in avr_cpu_reset(), Philippe Mathieu-Daudé, 2020/07/07
- Re: [PULL 00/32] AVR port, Peter Maydell, 2020/07/10