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[PATCH 1/2] target/i386: set SSE FTZ in correct floating-point state
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From: |
Joseph Myers |
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Subject: |
[PATCH 1/2] target/i386: set SSE FTZ in correct floating-point state |
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Date: |
Thu, 25 Jun 2020 23:57:44 +0000 |
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User-agent: |
Alpine 2.21 (DEB 202 2017-01-01) |
The code to set floating-point state when MXCSR changes calls
set_flush_to_zero on &env->fp_status, so affecting the x87
floating-point state rather than the SSE state. Fix to call it for
&env->sse_status instead.
Signed-off-by: Joseph Myers <joseph@codesourcery.com>
---
target/i386/fpu_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/i386/fpu_helper.c b/target/i386/fpu_helper.c
index 8ef5b463ea..6590ce482f 100644
--- a/target/i386/fpu_helper.c
+++ b/target/i386/fpu_helper.c
@@ -1830,7 +1830,7 @@ void update_mxcsr_status(CPUX86State *env)
set_flush_inputs_to_zero((mxcsr & SSE_DAZ) ? 1 : 0, &env->sse_status);
/* set flush to zero */
- set_flush_to_zero((mxcsr & SSE_FZ) ? 1 : 0, &env->fp_status);
+ set_flush_to_zero((mxcsr & SSE_FZ) ? 1 : 0, &env->sse_status);
}
void helper_ldmxcsr(CPUX86State *env, uint32_t val)
--
2.17.1
--
Joseph S. Myers
joseph@codesourcery.com