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[PULL 21/84] riscv: Fix to put "riscv.hart_array" devices on sysbus
From: |
Markus Armbruster |
Subject: |
[PULL 21/84] riscv: Fix to put "riscv.hart_array" devices on sysbus |
Date: |
Mon, 15 Jun 2020 22:39:05 +0200 |
riscv_sifive_e_soc_init(), riscv_sifive_u_soc_init(),
spike_board_init(), spike_v1_10_0_board_init(),
spike_v1_09_1_board_init(), and riscv_virt_board_init() create
"riscv-hart_array" sysbus devices in a way that leaves them unplugged.
Create them the common way that puts them into the main system bus.
Affects machines sifive_e, sifive_u, spike, spike_v1.10, spike_v1.9.1,
and virt. Visible in "info qtree", here's the change for sifive_e:
bus: main-system-bus
type System
+ dev: riscv.hart_array, id ""
+ num-harts = 1 (0x1)
+ hartid-base = 0 (0x0)
+ cpu-type = "sifive-e31-riscv-cpu"
dev: sifive_soc.gpio, id ""
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Alistair Francis <Alistair.Francis@wdc.com>
Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Cc: qemu-riscv@nongnu.org
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20200609122339.937862-20-armbru@redhat.com>
---
hw/riscv/opentitan.c | 5 ++---
hw/riscv/sifive_e.c | 5 ++---
hw/riscv/sifive_u.c | 14 ++++++--------
hw/riscv/spike.c | 4 ++--
hw/riscv/virt.c | 4 ++--
5 files changed, 14 insertions(+), 18 deletions(-)
diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c
index b4fb836466..29887fe363 100644
--- a/hw/riscv/opentitan.c
+++ b/hw/riscv/opentitan.c
@@ -94,9 +94,8 @@ static void riscv_lowrisc_ibex_soc_init(Object *obj)
{
LowRISCIbexSoCState *s = RISCV_IBEX_SOC(obj);
- object_initialize_child(obj, "cpus", &s->cpus,
- sizeof(s->cpus), TYPE_RISCV_HART_ARRAY,
- &error_abort, NULL);
+ sysbus_init_child_obj(obj, "cpus", &s->cpus,
+ sizeof(s->cpus), TYPE_RISCV_HART_ARRAY);
}
static void riscv_lowrisc_ibex_soc_realize(DeviceState *dev_soc, Error **errp)
diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c
index 472a98970b..d2e2350a4d 100644
--- a/hw/riscv/sifive_e.c
+++ b/hw/riscv/sifive_e.c
@@ -149,9 +149,8 @@ static void riscv_sifive_e_soc_init(Object *obj)
MachineState *ms = MACHINE(qdev_get_machine());
SiFiveESoCState *s = RISCV_E_SOC(obj);
- object_initialize_child(obj, "cpus", &s->cpus,
- sizeof(s->cpus), TYPE_RISCV_HART_ARRAY,
- &error_abort, NULL);
+ sysbus_init_child_obj(obj, "cpus", &s->cpus,
+ sizeof(s->cpus), TYPE_RISCV_HART_ARRAY);
object_property_set_int(OBJECT(&s->cpus), ms->smp.cpus, "num-harts",
&error_abort);
sysbus_init_child_obj(obj, "riscv.sifive.e.gpio0",
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index f9fef2be91..d6c6364596 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -491,10 +491,9 @@ static void sifive_u_soc_instance_init(Object *obj)
&error_abort, NULL);
qdev_prop_set_uint32(DEVICE(&s->e_cluster), "cluster-id", 0);
- object_initialize_child(OBJECT(&s->e_cluster), "e-cpus",
- &s->e_cpus, sizeof(s->e_cpus),
- TYPE_RISCV_HART_ARRAY, &error_abort,
- NULL);
+ sysbus_init_child_obj(OBJECT(&s->e_cluster), "e-cpus",
+ &s->e_cpus, sizeof(s->e_cpus),
+ TYPE_RISCV_HART_ARRAY);
qdev_prop_set_uint32(DEVICE(&s->e_cpus), "num-harts", 1);
qdev_prop_set_uint32(DEVICE(&s->e_cpus), "hartid-base", 0);
qdev_prop_set_string(DEVICE(&s->e_cpus), "cpu-type", SIFIVE_E_CPU);
@@ -504,10 +503,9 @@ static void sifive_u_soc_instance_init(Object *obj)
&error_abort, NULL);
qdev_prop_set_uint32(DEVICE(&s->u_cluster), "cluster-id", 1);
- object_initialize_child(OBJECT(&s->u_cluster), "u-cpus",
- &s->u_cpus, sizeof(s->u_cpus),
- TYPE_RISCV_HART_ARRAY, &error_abort,
- NULL);
+ sysbus_init_child_obj(OBJECT(&s->u_cluster), "u-cpus",
+ &s->u_cpus, sizeof(s->u_cpus),
+ TYPE_RISCV_HART_ARRAY);
qdev_prop_set_uint32(DEVICE(&s->u_cpus), "num-harts", ms->smp.cpus - 1);
qdev_prop_set_uint32(DEVICE(&s->u_cpus), "hartid-base", 1);
qdev_prop_set_string(DEVICE(&s->u_cpus), "cpu-type", SIFIVE_U_CPU);
diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
index 7bbbdb5036..7d1119dcb6 100644
--- a/hw/riscv/spike.c
+++ b/hw/riscv/spike.c
@@ -169,8 +169,8 @@ static void spike_board_init(MachineState *machine)
unsigned int smp_cpus = machine->smp.cpus;
/* Initialize SOC */
- object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc),
- TYPE_RISCV_HART_ARRAY, &error_abort, NULL);
+ sysbus_init_child_obj(OBJECT(machine), "soc", &s->soc, sizeof(s->soc),
+ TYPE_RISCV_HART_ARRAY);
object_property_set_str(OBJECT(&s->soc), machine->cpu_type, "cpu-type",
&error_abort);
object_property_set_int(OBJECT(&s->soc), smp_cpus, "num-harts",
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 4e4c494a70..d569b38d1b 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -485,8 +485,8 @@ static void virt_machine_init(MachineState *machine)
unsigned int smp_cpus = machine->smp.cpus;
/* Initialize SOC */
- object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc),
- TYPE_RISCV_HART_ARRAY, &error_abort, NULL);
+ sysbus_init_child_obj(OBJECT(machine), "soc", &s->soc, sizeof(s->soc),
+ TYPE_RISCV_HART_ARRAY);
object_property_set_str(OBJECT(&s->soc), machine->cpu_type, "cpu-type",
&error_abort);
object_property_set_int(OBJECT(&s->soc), smp_cpus, "num-harts",
--
2.26.2
- [PULL 22/84] riscv: Fix type of SiFive[EU]SocState, member parent_obj, (continued)
- [PULL 22/84] riscv: Fix type of SiFive[EU]SocState, member parent_obj, Markus Armbruster, 2020/06/15
- [PULL 19/84] pnv/psi: Correct the pnv-psi* devices not to be sysbus devices, Markus Armbruster, 2020/06/15
- [PULL 27/84] qdev: Rename qbus_realize() to qbus_init(), Markus Armbruster, 2020/06/15
- [PULL 11/84] macio: Fix to realize "mos6522-cuda" and "mos6522-pmu" devices, Markus Armbruster, 2020/06/15
- [PULL 15/84] ppc4xx: Drop redundant device realization, Markus Armbruster, 2020/06/15
- [PULL 14/84] MAINTAINERS: Make section PowerNV cover pci-host/pnv* as well, Markus Armbruster, 2020/06/15
- [PULL 17/84] macio: Fix macio-bus to be a subtype of System bus, Markus Armbruster, 2020/06/15
- [PULL 31/84] qdev: Put qdev_new() to use with Coccinelle, Markus Armbruster, 2020/06/15
- [PULL 08/84] armv7m: Delete unused "ARM,bitband-memory" devices, Markus Armbruster, 2020/06/15
- [PULL 35/84] qdev: Convert uses of qdev_create() with Coccinelle, Markus Armbruster, 2020/06/15
- [PULL 21/84] riscv: Fix to put "riscv.hart_array" devices on sysbus,
Markus Armbruster <=
- [PULL 03/84] arm/stm32f405: Fix realization of "stm32f2xx-adc" devices, Markus Armbruster, 2020/06/15
- [PULL 36/84] qdev: Convert uses of qdev_create() manually, Markus Armbruster, 2020/06/15
- [PULL 20/84] display/sm501 display/ati: Fix to realize "i2c-ddc", Markus Armbruster, 2020/06/15
- [PULL 33/84] qdev: Convert to qdev_unrealize() with Coccinelle, Markus Armbruster, 2020/06/15
- [PULL 25/84] sd: Hide the qdev-but-not-quite thing created by sd_init(), Markus Armbruster, 2020/06/15
- [PULL 18/84] ppc/pnv: Put "*-pnv-chip" and "pnv-xive" on the main system bus, Markus Armbruster, 2020/06/15
- [PULL 37/84] qdev: Convert uses of qdev_set_parent_bus() with Coccinelle, Markus Armbruster, 2020/06/15
- [PULL 30/84] qdev: New qdev_new(), qdev_realize(), etc., Markus Armbruster, 2020/06/15
- [PULL 29/84] Revert "hw/versatile: realize the PCI root bus as part of the versatile init", Markus Armbruster, 2020/06/15
- [PULL 26/84] qdev: Assert onboard devices all get realized properly, Markus Armbruster, 2020/06/15