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Re: [PATCH] hw/m68k/mcf5206: Replace remaining hw_error()s by qemu_log_m


From: Philippe Mathieu-Daudé
Subject: Re: [PATCH] hw/m68k/mcf5206: Replace remaining hw_error()s by qemu_log_mask()
Date: Thu, 11 Jun 2020 09:33:51 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.5.0

On 6/11/20 7:58 AM, Thomas Huth wrote:
> hw_error() dumps the CPU state and exits QEMU. This is ok during initial
> code development (to see where the guest code is currently executing),
> but it is certainly not the desired behavior that we want to present to
> normal users, and it can also cause trouble when e.g. fuzzing devices.
> Thus let's replace these hw_error()s by qemu_log_mask()s instead.
> 
> Signed-off-by: Thomas Huth <thuth@tuxfamily.org>

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

> ---
>  hw/m68k/mcf5206.c | 39 ++++++++++++++++++++++++++++-----------
>  1 file changed, 28 insertions(+), 11 deletions(-)
> 
> diff --git a/hw/m68k/mcf5206.c b/hw/m68k/mcf5206.c
> index a2fef04f8e..94a37a1a46 100644
> --- a/hw/m68k/mcf5206.c
> +++ b/hw/m68k/mcf5206.c
> @@ -10,7 +10,6 @@
>  #include "qemu/error-report.h"
>  #include "qemu/log.h"
>  #include "cpu.h"
> -#include "hw/hw.h"
>  #include "hw/irq.h"
>  #include "hw/m68k/mcf.h"
>  #include "qemu/timer.h"
> @@ -69,10 +68,16 @@ static void m5206_timer_recalibrate(m5206_timer_state *s)
>      if (mode == 2)
>          prescale *= 16;
>  
> -    if (mode == 3 || mode == 0)
> -        hw_error("m5206_timer: mode %d not implemented\n", mode);
> -    if ((s->tmr & TMR_FRR) == 0)
> -        hw_error("m5206_timer: free running mode not implemented\n");
> +    if (mode == 3 || mode == 0) {
> +        qemu_log_mask(LOG_UNIMP, "m5206_timer: mode %d not implemented\n",
> +                      mode);
> +        goto exit;
> +    }
> +    if ((s->tmr & TMR_FRR) == 0) {
> +        qemu_log_mask(LOG_UNIMP,
> +                      "m5206_timer: free running mode not implemented\n");
> +        goto exit;
> +    }
>  
>      /* Assume 66MHz system clock.  */
>      ptimer_set_freq(s->timer, 66000000 / prescale);
> @@ -391,7 +396,9 @@ static uint32_t m5206_mbar_readb(void *opaque, hwaddr 
> offset)
>      m5206_mbar_state *s = (m5206_mbar_state *)opaque;
>      offset &= 0x3ff;
>      if (offset >= 0x200) {
> -        hw_error("Bad MBAR read offset 0x%x", (int)offset);
> +        qemu_log_mask(LOG_GUEST_ERROR, "Bad MBAR read offset 0x%" 
> HWADDR_PRIX,
> +                      offset);
> +        return 0;
>      }
>      if (m5206_mbar_width[offset >> 2] > 1) {
>          uint16_t val;
> @@ -410,7 +417,9 @@ static uint32_t m5206_mbar_readw(void *opaque, hwaddr 
> offset)
>      int width;
>      offset &= 0x3ff;
>      if (offset >= 0x200) {
> -        hw_error("Bad MBAR read offset 0x%x", (int)offset);
> +        qemu_log_mask(LOG_GUEST_ERROR, "Bad MBAR read offset 0x%" 
> HWADDR_PRIX,
> +                      offset);
> +        return 0;
>      }
>      width = m5206_mbar_width[offset >> 2];
>      if (width > 2) {
> @@ -434,7 +443,9 @@ static uint32_t m5206_mbar_readl(void *opaque, hwaddr 
> offset)
>      int width;
>      offset &= 0x3ff;
>      if (offset >= 0x200) {
> -        hw_error("Bad MBAR read offset 0x%x", (int)offset);
> +        qemu_log_mask(LOG_GUEST_ERROR, "Bad MBAR read offset 0x%" 
> HWADDR_PRIX,
> +                      offset);
> +        return 0;
>      }
>      width = m5206_mbar_width[offset >> 2];
>      if (width < 4) {
> @@ -458,7 +469,9 @@ static void m5206_mbar_writeb(void *opaque, hwaddr offset,
>      int width;
>      offset &= 0x3ff;
>      if (offset >= 0x200) {
> -        hw_error("Bad MBAR write offset 0x%x", (int)offset);
> +        qemu_log_mask(LOG_GUEST_ERROR, "Bad MBAR write offset 0x%" 
> HWADDR_PRIX,
> +                      offset);
> +        return;
>      }
>      width = m5206_mbar_width[offset >> 2];
>      if (width > 1) {
> @@ -482,7 +495,9 @@ static void m5206_mbar_writew(void *opaque, hwaddr offset,
>      int width;
>      offset &= 0x3ff;
>      if (offset >= 0x200) {
> -        hw_error("Bad MBAR write offset 0x%x", (int)offset);
> +        qemu_log_mask(LOG_GUEST_ERROR, "Bad MBAR write offset 0x%" 
> HWADDR_PRIX,
> +                      offset);
> +        return;
>      }
>      width = m5206_mbar_width[offset >> 2];
>      if (width > 2) {
> @@ -510,7 +525,9 @@ static void m5206_mbar_writel(void *opaque, hwaddr offset,
>      int width;
>      offset &= 0x3ff;
>      if (offset >= 0x200) {
> -        hw_error("Bad MBAR write offset 0x%x", (int)offset);
> +        qemu_log_mask(LOG_GUEST_ERROR, "Bad MBAR write offset 0x%" 
> HWADDR_PRIX,
> +                      offset);
> +        return;
>      }
>      width = m5206_mbar_width[offset >> 2];
>      if (width < 4) {
> 



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