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[RFC PATCH] softfloat: partially convert float32_to_floatx80 to new styl


From: Alex Bennée
Subject: [RFC PATCH] softfloat: partially convert float32_to_floatx80 to new style (HACK)
Date: Tue, 9 Jun 2020 10:29:46 +0100

This is just an experimental conversion of one of the float to x80
conversions to use the "new style" decomposition code. Of course it
elides over any potential fraction loss you may get doing actual
calculation but it may allow us to eliminate some more old code.

Of course the ideal would still to be to find a way to handle the
a bigger fractional part needed for x80 (and float128) in the common
code but so far I haven't managed to find a way to unionise the
FloatParts structure that doesn't slow down the existing 16/32/64
paths with unnecessary padding.

Is it worth converting the conversion routines nonetheless?

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Cc: Joseph Myers <joseph@codesourcery.com>
---
 fpu/softfloat.c | 40 +++++++++++++++++++---------------------
 1 file changed, 19 insertions(+), 21 deletions(-)

diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index dc2266b86ec..ccf00b1cac6 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -4438,31 +4438,29 @@ float128 uint64_to_float128(uint64_t a, float_status 
*status)
 
 floatx80 float32_to_floatx80(float32 a, float_status *status)
 {
-    bool aSign;
-    int aExp;
-    uint32_t aSig;
+    FloatParts pa = float32_unpack_canonical(a, status);
 
-    a = float32_squash_input_denormal(a, status);
-    aSig = extractFloat32Frac( a );
-    aExp = extractFloat32Exp( a );
-    aSign = extractFloat32Sign( a );
-    if ( aExp == 0xFF ) {
-        if (aSig) {
-            floatx80 res = commonNaNToFloatx80(float32ToCommonNaN(a, status),
-                                               status);
-            return floatx80_silence_nan(res, status);
-        }
-        return packFloatx80(aSign,
+    switch (pa.cls) {
+    case float_class_snan:
+    case float_class_qnan:
+    {
+        floatx80 res = commonNaNToFloatx80(float32ToCommonNaN(a, status), 
status);
+        return floatx80_silence_nan(res, status);
+    }
+    case float_class_inf:
+        return packFloatx80(pa.sign,
                             floatx80_infinity_high,
                             floatx80_infinity_low);
+        break;
+    case float_class_zero:
+        return packFloatx80(pa.sign, 0, 0);
+    case float_class_normal:
+        /* pa.frac << 1 drops the IMPLICIT 1 to leave only the
+           fractional part */
+        return packFloatx80(pa.sign, pa.exp + 16383, pa.frac << 1);
+    default:
+        g_assert_not_reached();
     }
-    if ( aExp == 0 ) {
-        if ( aSig == 0 ) return packFloatx80( aSign, 0, 0 );
-        normalizeFloat32Subnormal( aSig, &aExp, &aSig );
-    }
-    aSig |= 0x00800000;
-    return packFloatx80( aSign, aExp + 0x3F80, ( (uint64_t) aSig )<<40 );
-
 }
 
 /*----------------------------------------------------------------------------
-- 
2.20.1




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