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[PULL 03/12] tcg: Remove expansion to shift by vector from do_shifts
From: |
Richard Henderson |
Subject: |
[PULL 03/12] tcg: Remove expansion to shift by vector from do_shifts |
Date: |
Tue, 2 Jun 2020 10:01:42 -0700 |
We do not reflect this expansion in tcg_can_emit_vecop_list,
so it is unused and unusable. However, we actually perform
the same expansion in do_gvec_shifts, so it is also unneeded.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/tcg-op-vec.c | 35 +++++++++++------------------------
1 file changed, 11 insertions(+), 24 deletions(-)
diff --git a/tcg/tcg-op-vec.c b/tcg/tcg-op-vec.c
index 488f9bd27b..fb1250fee6 100644
--- a/tcg/tcg-op-vec.c
+++ b/tcg/tcg-op-vec.c
@@ -707,7 +707,7 @@ void tcg_gen_rotrv_vec(unsigned vece, TCGv_vec r, TCGv_vec
a, TCGv_vec b)
}
static void do_shifts(unsigned vece, TCGv_vec r, TCGv_vec a,
- TCGv_i32 s, TCGOpcode opc_s, TCGOpcode opc_v)
+ TCGv_i32 s, TCGOpcode opc)
{
TCGTemp *rt = tcgv_vec_temp(r);
TCGTemp *at = tcgv_vec_temp(a);
@@ -716,48 +716,35 @@ static void do_shifts(unsigned vece, TCGv_vec r, TCGv_vec
a,
TCGArg ai = temp_arg(at);
TCGArg si = temp_arg(st);
TCGType type = rt->base_type;
- const TCGOpcode *hold_list;
int can;
tcg_debug_assert(at->base_type >= type);
- tcg_assert_listed_vecop(opc_s);
- hold_list = tcg_swap_vecop_list(NULL);
-
- can = tcg_can_emit_vec_op(opc_s, type, vece);
+ tcg_assert_listed_vecop(opc);
+ can = tcg_can_emit_vec_op(opc, type, vece);
if (can > 0) {
- vec_gen_3(opc_s, type, vece, ri, ai, si);
+ vec_gen_3(opc, type, vece, ri, ai, si);
} else if (can < 0) {
- tcg_expand_vec_op(opc_s, type, vece, ri, ai, si);
+ const TCGOpcode *hold_list = tcg_swap_vecop_list(NULL);
+ tcg_expand_vec_op(opc, type, vece, ri, ai, si);
+ tcg_swap_vecop_list(hold_list);
} else {
- TCGv_vec vec_s = tcg_temp_new_vec(type);
-
- if (vece == MO_64) {
- TCGv_i64 s64 = tcg_temp_new_i64();
- tcg_gen_extu_i32_i64(s64, s);
- tcg_gen_dup_i64_vec(MO_64, vec_s, s64);
- tcg_temp_free_i64(s64);
- } else {
- tcg_gen_dup_i32_vec(vece, vec_s, s);
- }
- do_op3_nofail(vece, r, a, vec_s, opc_v);
- tcg_temp_free_vec(vec_s);
+ g_assert_not_reached();
}
- tcg_swap_vecop_list(hold_list);
}
void tcg_gen_shls_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_i32 b)
{
- do_shifts(vece, r, a, b, INDEX_op_shls_vec, INDEX_op_shlv_vec);
+ do_shifts(vece, r, a, b, INDEX_op_shls_vec);
}
void tcg_gen_shrs_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_i32 b)
{
- do_shifts(vece, r, a, b, INDEX_op_shrs_vec, INDEX_op_shrv_vec);
+ do_shifts(vece, r, a, b, INDEX_op_shrs_vec);
}
void tcg_gen_sars_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_i32 b)
{
- do_shifts(vece, r, a, b, INDEX_op_sars_vec, INDEX_op_sarv_vec);
+ do_shifts(vece, r, a, b, INDEX_op_sars_vec);
}
void tcg_gen_bitsel_vec(unsigned vece, TCGv_vec r, TCGv_vec a,
--
2.25.1
- [PULL 00/12] tcg patch queue, Richard Henderson, 2020/06/02
- [PULL 01/12] tcg: Implement gvec support for rotate by immediate, Richard Henderson, 2020/06/02
- [PULL 02/12] tcg: Implement gvec support for rotate by vector, Richard Henderson, 2020/06/02
- [PULL 03/12] tcg: Remove expansion to shift by vector from do_shifts,
Richard Henderson <=
- [PULL 04/12] tcg: Implement gvec support for rotate by scalar, Richard Henderson, 2020/06/02
- [PULL 05/12] tcg/i386: Implement INDEX_op_rotl{i,s,v}_vec, Richard Henderson, 2020/06/02
- [PULL 06/12] tcg/aarch64: Implement INDEX_op_rotl{i,v}_vec, Richard Henderson, 2020/06/02
- [PULL 07/12] tcg/ppc: Implement INDEX_op_rot[lr]v_vec, Richard Henderson, 2020/06/02
- [PULL 08/12] target/ppc: Use tcg_gen_gvec_rotlv, Richard Henderson, 2020/06/02
- [PULL 10/12] tcg: Improve move ops in liveness_pass_2, Richard Henderson, 2020/06/02
- [PULL 11/12] accel/tcg: Adjust cpu_signal_handler for NetBSD/arm, Richard Henderson, 2020/06/02
- [PULL 09/12] target/s390x: Use tcg_gen_gvec_rotl{i,s,v}, Richard Henderson, 2020/06/02
- [PULL 12/12] accel/tcg: Provide a NetBSD specific aarch64 cpu_signal_handler, Richard Henderson, 2020/06/02
- Re: [PULL 00/12] tcg patch queue, Peter Maydell, 2020/06/02