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Re: [PATCH 0/9] ppc/pnv: Introduce the XIVE2 and PHB5 controllers for th
From: |
Greg Kurz |
Subject: |
Re: [PATCH 0/9] ppc/pnv: Introduce the XIVE2 and PHB5 controllers for the POWER10 chip |
Date: |
Tue, 19 May 2020 11:40:28 +0200 |
On Wed, 13 May 2020 17:11:00 +0200
Cédric Le Goater <address@hidden> wrote:
> Hello,
>
> This series completes the PowerNV POWER10 machine with the XIVE2
> interrupt controller and the PHB5 PCI host bridge controller.
>
> The XIVE2 interrupt controller of the POWER10 processor follows the
> same logic than on POWER9 but the HW interface has been largely
> reviewed. To avoid adding too much complexity in the P9 XIVE models,
> a new XIVE2 core framework is introduced.
>
> The PHB5 and PHB4 controllers are very similar. Not much changes there
> apart from the mapping addresses and ids. There is more to come on
> PHB5 regarding interrupt offload on the interrupt controller, but this
> is for another round.
>
> This series also adds basic OCC and CPU Quad models which are not very
> much exercised by the firmware.
>
> Thanks,
>
> C.
>
This series is huge and it requires great knowledge of the HW, that I don't
have (who does? ;-), to do a real review. I'll stick to find obvious errors
and nits...
> Cédric Le Goater (9):
> ppc/xive: Export PQ get/set routines
> ppc/xive: Export xive_presenter_notify()
> ppc/xive2: Introduce a XIVE2 core framework
> ppc/xive2: Introduce a presenter matching routine
> ppc/pnv: Add a XIVE2 controller to the POWER10 chip.
> ppc/pnv: Add a OCC model for POWER10
> ppc/pnv: Add POWER10 quads
> ppc/pnv: Add model for POWER9 PHB5 PCIe Host bridge
> ppc/psi: Add support for StoreEOI and 64k ESB pages (POWER10)
>
> hw/intc/pnv_xive2_regs.h | 428 +++++++
> include/hw/pci-host/pnv_phb4.h | 11 +
> include/hw/ppc/pnv.h | 30 +
> include/hw/ppc/pnv_occ.h | 2 +
> include/hw/ppc/pnv_xive.h | 71 ++
> include/hw/ppc/pnv_xscom.h | 12 +
> include/hw/ppc/xive.h | 8 +
> include/hw/ppc/xive2.h | 93 ++
> include/hw/ppc/xive2_regs.h | 198 ++++
> hw/intc/pnv_xive2.c | 2026 ++++++++++++++++++++++++++++++++
> hw/intc/spapr_xive_kvm.c | 8 +-
> hw/intc/xive.c | 14 +-
> hw/intc/xive2.c | 756 ++++++++++++
> hw/pci-host/pnv_phb4_pec.c | 44 +
> hw/ppc/pnv.c | 243 +++-
> hw/ppc/pnv_occ.c | 17 +
> hw/ppc/pnv_psi.c | 32 +-
> hw/intc/Makefile.objs | 4 +-
> 18 files changed, 3974 insertions(+), 23 deletions(-)
> create mode 100644 hw/intc/pnv_xive2_regs.h
> create mode 100644 include/hw/ppc/xive2.h
> create mode 100644 include/hw/ppc/xive2_regs.h
> create mode 100644 hw/intc/pnv_xive2.c
> create mode 100644 hw/intc/xive2.c
>
- [PATCH 1/9] ppc/xive: Export PQ get/set routines, (continued)
- [PATCH 1/9] ppc/xive: Export PQ get/set routines, Cédric Le Goater, 2020/05/13
- [PATCH 2/9] ppc/xive: Export xive_presenter_notify(), Cédric Le Goater, 2020/05/13
- [PATCH 3/9] ppc/xive2: Introduce a XIVE2 core framework, Cédric Le Goater, 2020/05/13
- [PATCH 4/9] ppc/xive2: Introduce a presenter matching routine, Cédric Le Goater, 2020/05/13
- [PATCH 5/9] ppc/pnv: Add a XIVE2 controller to the POWER10 chip., Cédric Le Goater, 2020/05/13
- [PATCH 6/9] ppc/pnv: Add a OCC model for POWER10, Cédric Le Goater, 2020/05/13
- [PATCH 7/9] ppc/pnv: Add POWER10 quads, Cédric Le Goater, 2020/05/13
- [PATCH 8/9] ppc/pnv: Add model for POWER9 PHB5 PCIe Host bridge, Cédric Le Goater, 2020/05/13
- [PATCH 9/9] ppc/psi: Add support for StoreEOI and 64k ESB pages (POWER10), Cédric Le Goater, 2020/05/13
- Re: [PATCH 0/9] ppc/pnv: Introduce the XIVE2 and PHB5 controllers for the POWER10 chip,
Greg Kurz <=