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[PATCH v4 11/16] target/arm: Remove fp_status from helper_{recpe, rsqrte
From: |
Richard Henderson |
Subject: |
[PATCH v4 11/16] target/arm: Remove fp_status from helper_{recpe, rsqrte}_u32 |
Date: |
Wed, 13 May 2020 09:32:40 -0700 |
These operations do not touch fp_status.
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/helper.h | 4 ++--
target/arm/translate-a64.c | 5 ++---
target/arm/translate.c | 12 ++----------
target/arm/vfp_helper.c | 5 ++---
4 files changed, 8 insertions(+), 18 deletions(-)
diff --git a/target/arm/helper.h b/target/arm/helper.h
index 33c76192d2..aed3050965 100644
--- a/target/arm/helper.h
+++ b/target/arm/helper.h
@@ -211,8 +211,8 @@ DEF_HELPER_FLAGS_2(recpe_f64, TCG_CALL_NO_RWG, f64, f64,
ptr)
DEF_HELPER_FLAGS_2(rsqrte_f16, TCG_CALL_NO_RWG, f16, f16, ptr)
DEF_HELPER_FLAGS_2(rsqrte_f32, TCG_CALL_NO_RWG, f32, f32, ptr)
DEF_HELPER_FLAGS_2(rsqrte_f64, TCG_CALL_NO_RWG, f64, f64, ptr)
-DEF_HELPER_2(recpe_u32, i32, i32, ptr)
-DEF_HELPER_FLAGS_2(rsqrte_u32, TCG_CALL_NO_RWG, i32, i32, ptr)
+DEF_HELPER_FLAGS_1(recpe_u32, TCG_CALL_NO_RWG, i32, i32)
+DEF_HELPER_FLAGS_1(rsqrte_u32, TCG_CALL_NO_RWG, i32, i32)
DEF_HELPER_FLAGS_4(neon_tbl, TCG_CALL_NO_RWG, i32, i32, i32, ptr, i32)
DEF_HELPER_3(shl_cc, i32, env, i32, i32)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index ea5f6ceadc..367fa403ae 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -9699,7 +9699,7 @@ static void handle_2misc_reciprocal(DisasContext *s, int
opcode,
switch (opcode) {
case 0x3c: /* URECPE */
- gen_helper_recpe_u32(tcg_res, tcg_op, fpst);
+ gen_helper_recpe_u32(tcg_res, tcg_op);
break;
case 0x3d: /* FRECPE */
gen_helper_recpe_f32(tcg_res, tcg_op, fpst);
@@ -12244,7 +12244,6 @@ static void disas_simd_two_reg_misc(DisasContext *s,
uint32_t insn)
unallocated_encoding(s);
return;
}
- need_fpstatus = true;
break;
case 0x1e: /* FRINT32Z */
case 0x1f: /* FRINT64Z */
@@ -12412,7 +12411,7 @@ static void disas_simd_two_reg_misc(DisasContext *s,
uint32_t insn)
gen_helper_rints_exact(tcg_res, tcg_op, tcg_fpstatus);
break;
case 0x7c: /* URSQRTE */
- gen_helper_rsqrte_u32(tcg_res, tcg_op, tcg_fpstatus);
+ gen_helper_rsqrte_u32(tcg_res, tcg_op);
break;
case 0x1e: /* FRINT32Z */
case 0x5e: /* FRINT32X */
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 7eb30cde60..391a09b439 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -6875,19 +6875,11 @@ static int disas_neon_data_insn(DisasContext *s,
uint32_t insn)
break;
}
case NEON_2RM_VRECPE:
- {
- TCGv_ptr fpstatus = get_fpstatus_ptr(1);
- gen_helper_recpe_u32(tmp, tmp, fpstatus);
- tcg_temp_free_ptr(fpstatus);
+ gen_helper_recpe_u32(tmp, tmp);
break;
- }
case NEON_2RM_VRSQRTE:
- {
- TCGv_ptr fpstatus = get_fpstatus_ptr(1);
- gen_helper_rsqrte_u32(tmp, tmp, fpstatus);
- tcg_temp_free_ptr(fpstatus);
+ gen_helper_rsqrte_u32(tmp, tmp);
break;
- }
case NEON_2RM_VRECPE_F:
{
TCGv_ptr fpstatus = get_fpstatus_ptr(1);
diff --git a/target/arm/vfp_helper.c b/target/arm/vfp_helper.c
index 930d6e747f..ec007fce25 100644
--- a/target/arm/vfp_helper.c
+++ b/target/arm/vfp_helper.c
@@ -1023,9 +1023,8 @@ float64 HELPER(rsqrte_f64)(float64 input, void *fpstp)
return make_float64(val);
}
-uint32_t HELPER(recpe_u32)(uint32_t a, void *fpstp)
+uint32_t HELPER(recpe_u32)(uint32_t a)
{
- /* float_status *s = fpstp; */
int input, estimate;
if ((a & 0x80000000) == 0) {
@@ -1038,7 +1037,7 @@ uint32_t HELPER(recpe_u32)(uint32_t a, void *fpstp)
return deposit32(0, (32 - 9), 9, estimate);
}
-uint32_t HELPER(rsqrte_u32)(uint32_t a, void *fpstp)
+uint32_t HELPER(rsqrte_u32)(uint32_t a)
{
int estimate;
--
2.20.1
- [PATCH v4 00/16] target/arm: partial vector cleanup, Richard Henderson, 2020/05/13
- [PATCH v4 01/16] target/arm: Create gen_gvec_[us]sra, Richard Henderson, 2020/05/13
- [PATCH v4 02/16] target/arm: Create gen_gvec_{u,s}{rshr,rsra}, Richard Henderson, 2020/05/13
- [PATCH v4 05/16] target/arm: Tidy handle_vec_simd_shri, Richard Henderson, 2020/05/13
- [PATCH v4 04/16] target/arm: Remove unnecessary range check for VSHL, Richard Henderson, 2020/05/13
- [PATCH v4 06/16] target/arm: Create gen_gvec_{ceq,clt,cle,cgt,cge}0, Richard Henderson, 2020/05/13
- [PATCH v4 03/16] target/arm: Create gen_gvec_{sri,sli}, Richard Henderson, 2020/05/13
- [PATCH v4 08/16] target/arm: Swap argument order for VSHL during decode, Richard Henderson, 2020/05/13
- [PATCH v4 07/16] target/arm: Create gen_gvec_{mla,mls}, Richard Henderson, 2020/05/13
- [PATCH v4 11/16] target/arm: Remove fp_status from helper_{recpe, rsqrte}_u32,
Richard Henderson <=
- [PATCH v4 12/16] target/arm: Create gen_gvec_{qrdmla,qrdmls}, Richard Henderson, 2020/05/13
- [PATCH v4 09/16] target/arm: Create gen_gvec_{cmtst,ushl,sshl}, Richard Henderson, 2020/05/13
- [PATCH v4 13/16] target/arm: Pass pointer to qc to qrdmla/qrdmls, Richard Henderson, 2020/05/13
- [PATCH v4 10/16] target/arm: Create gen_gvec_{uqadd, sqadd, uqsub, sqsub}, Richard Henderson, 2020/05/13
- [PATCH v4 15/16] target/arm: Vectorize SABD/UABD, Richard Henderson, 2020/05/13
- [PATCH v4 16/16] target/arm: Vectorize SABA/UABA, Richard Henderson, 2020/05/13
- [PATCH v4 14/16] target/arm: Clear tail in gvec_fmul_idx_*, gvec_fmla_idx_*, Richard Henderson, 2020/05/13
- Re: [PATCH v4 00/16] target/arm: partial vector cleanup, Peter Maydell, 2020/05/14