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[PULL 34/34] target/arm: Fix tcg_gen_gvec_dup_imm vs DUP (indexed)
From: |
Peter Maydell |
Subject: |
[PULL 34/34] target/arm: Fix tcg_gen_gvec_dup_imm vs DUP (indexed) |
Date: |
Mon, 11 May 2020 14:34:05 +0100 |
From: Richard Henderson <address@hidden>
DUP (indexed) can duplicate 128-bit elements, so using esz
unconditionally can assert in tcg_gen_gvec_dup_imm.
Fixes: 8711e71f9cbb
Reported-by: Laurent Desnogues <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Reviewed-by: Laurent Desnogues <address@hidden>
Tested-by: Laurent Desnogues <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/translate-sve.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index 8398c323624..ac7b3119e5f 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -2044,7 +2044,11 @@ static bool trans_DUP_x(DisasContext *s, arg_DUP_x *a)
unsigned nofs = vec_reg_offset(s, a->rn, index, esz);
tcg_gen_gvec_dup_mem(esz, dofs, nofs, vsz, vsz);
} else {
- tcg_gen_gvec_dup_imm(esz, dofs, vsz, vsz, 0);
+ /*
+ * While dup_mem handles 128-bit elements, dup_imm does not.
+ * Thankfully element size doesn't matter for splatting zero.
+ */
+ tcg_gen_gvec_dup_imm(MO_64, dofs, vsz, vsz, 0);
}
}
return true;
--
2.20.1
- [PULL 22/34] target/arm: Use SVEContLdSt for contiguous stores, (continued)
- [PULL 22/34] target/arm: Use SVEContLdSt for contiguous stores, Peter Maydell, 2020/05/11
- [PULL 26/34] target/arm: Remove sve_memopidx, Peter Maydell, 2020/05/11
- [PULL 21/34] target/arm: Update contiguous first-fault and no-fault loads, Peter Maydell, 2020/05/11
- [PULL 27/34] target/arm/kvm: Inline set_feature() calls, Peter Maydell, 2020/05/11
- [PULL 28/34] target/arm: Make set_feature() available for other files, Peter Maydell, 2020/05/11
- [PULL 29/34] target/arm/cpu: Use ARRAY_SIZE() to iterate over ARMCPUInfo[], Peter Maydell, 2020/05/11
- [PULL 30/34] target/arm/cpu: Restrict v8M IDAU interface to Aarch32 CPUs, Peter Maydell, 2020/05/11
- [PULL 25/34] target/arm: Reuse sve_probe_page for gather loads, Peter Maydell, 2020/05/11
- [PULL 32/34] hw/arm/musicpal: Map the UART devices unconditionally, Peter Maydell, 2020/05/11
- [PULL 33/34] target/arm: Use tcg_gen_gvec_5_ptr for sve FMLA/FCMLA, Peter Maydell, 2020/05/11
- [PULL 34/34] target/arm: Fix tcg_gen_gvec_dup_imm vs DUP (indexed),
Peter Maydell <=
- [PULL 31/34] target/arm: Restrict TCG cpus to TCG accel, Peter Maydell, 2020/05/11
- Re: [PULL 00/34] target-arm queue, Peter Maydell, 2020/05/11
- Re: [PULL 00/34] target-arm queue, no-reply, 2020/05/11
- Re: [PULL 00/34] target-arm queue, Peter Maydell, 2020/05/11