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[PATCH v3 3/5] target/arm/cpu: Use ARRAY_SIZE() to iterate over ARMCPUIn
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH v3 3/5] target/arm/cpu: Use ARRAY_SIZE() to iterate over ARMCPUInfo[] |
Date: |
Mon, 4 May 2020 19:24:46 +0200 |
Use ARRAY_SIZE() to iterate over ARMCPUInfo[].
Since on the aarch64-linux-user build, arm_cpus[] is empty, add
the cpu_count variable and only iterate when it is non-zero.
Suggested-by: Richard Henderson <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
---
Without using cpu_count we get:
target/arm/cpu.c:2904:19: error: comparison of unsigned expression < 0 is
always false [-Werror=type-limits]
2904 | for (i = 0; i < ARRAY_SIZE(arm_cpus); ++i) {
| ^
cc1: all warnings being treated as errors
---
target/arm/cpu.c | 16 +++++++++-------
target/arm/cpu64.c | 8 +++-----
2 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 13959cb643..b4d73dd47c 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -2739,7 +2739,6 @@ static const ARMCPUInfo arm_cpus[] = {
{ .name = "any", .initfn = arm_max_initfn },
#endif
#endif
- { .name = NULL }
};
static Property arm_cpu_properties[] = {
@@ -2887,19 +2886,22 @@ static const TypeInfo idau_interface_type_info = {
static void arm_cpu_register_types(void)
{
- const ARMCPUInfo *info = arm_cpus;
+ const size_t cpu_count = ARRAY_SIZE(arm_cpus);
type_register_static(&arm_cpu_type_info);
type_register_static(&idau_interface_type_info);
- while (info->name) {
- arm_cpu_register(info);
- info++;
- }
-
#ifdef CONFIG_KVM
type_register_static(&host_arm_cpu_type_info);
#endif
+
+ if (cpu_count) {
+ size_t i;
+
+ for (i = 0; i < cpu_count; ++i) {
+ arm_cpu_register(&arm_cpus[i]);
+ }
+ }
}
type_init(arm_cpu_register_types)
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index cbaa5ed228..f5c49ee32d 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -734,7 +734,6 @@ static const ARMCPUInfo aarch64_cpus[] = {
{ .name = "cortex-a53", .initfn = aarch64_a53_initfn },
{ .name = "cortex-a72", .initfn = aarch64_a72_initfn },
{ .name = "max", .initfn = aarch64_max_initfn },
- { .name = NULL }
};
static bool aarch64_cpu_get_aarch64(Object *obj, Error **errp)
@@ -840,13 +839,12 @@ static const TypeInfo aarch64_cpu_type_info = {
static void aarch64_cpu_register_types(void)
{
- const ARMCPUInfo *info = aarch64_cpus;
+ size_t i;
type_register_static(&aarch64_cpu_type_info);
- while (info->name) {
- aarch64_cpu_register(info);
- info++;
+ for (i = 0; i < ARRAY_SIZE(aarch64_cpus); ++i) {
+ aarch64_cpu_register(&aarch64_cpus[i]);
}
}
--
2.21.3
- [PATCH v3 0/5] target/arm: Restrict TCG cpus to TCG accel, Philippe Mathieu-Daudé, 2020/05/04
- [PATCH v3 1/5] target/arm/kvm: Inline set_feature() calls, Philippe Mathieu-Daudé, 2020/05/04
- [PATCH v3 2/5] target/arm: Make set_feature() available for other files, Philippe Mathieu-Daudé, 2020/05/04
- [PATCH v3 4/5] target/arm/cpu: Restrict v8M IDAU interface to Aarch32 CPUs, Philippe Mathieu-Daudé, 2020/05/04
- [PATCH v3 3/5] target/arm/cpu: Use ARRAY_SIZE() to iterate over ARMCPUInfo[],
Philippe Mathieu-Daudé <=
- [PATCH v3 5/5] target/arm: Restrict TCG cpus to TCG accel, Philippe Mathieu-Daudé, 2020/05/04
- Re: [PATCH v3 0/5] target/arm: Restrict TCG cpus to TCG accel, Peter Maydell, 2020/05/11