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[PULL 27/31] target/arm/cpu: Update coding style to make checkpatch.pl h
From: |
Peter Maydell |
Subject: |
[PULL 27/31] target/arm/cpu: Update coding style to make checkpatch.pl happy |
Date: |
Thu, 30 Apr 2020 12:51:38 +0100 |
From: Philippe Mathieu-Daudé <address@hidden>
We will move this code in the next commit. Clean it up
first to avoid checkpatch.pl errors.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/cpu.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 30e961f7754..a1e38b38ba1 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -582,7 +582,8 @@ static bool arm_v7m_cpu_exec_interrupt(CPUState *cs, int
interrupt_request)
CPUARMState *env = &cpu->env;
bool ret = false;
- /* ARMv7-M interrupt masking works differently than -A or -R.
+ /*
+ * ARMv7-M interrupt masking works differently than -A or -R.
* There is no FIQ/IRQ distinction. Instead of I and F bits
* masking FIQ and IRQ interrupts, an exception is taken only
* if it is higher priority than the current execution priority
@@ -1912,7 +1913,8 @@ static void arm1026_initfn(Object *obj)
static void arm1136_r2_initfn(Object *obj)
{
ARMCPU *cpu = ARM_CPU(obj);
- /* What qemu calls "arm1136_r2" is actually the 1136 r0p2, ie an
+ /*
+ * What qemu calls "arm1136_r2" is actually the 1136 r0p2, ie an
* older core than plain "arm1136". In particular this does not
* have the v6K features.
* These ID register values are correct for 1136 but may be wrong
@@ -2698,7 +2700,8 @@ static const ARMCPUInfo arm_cpus[] = {
{ .name = "arm926", .initfn = arm926_initfn },
{ .name = "arm946", .initfn = arm946_initfn },
{ .name = "arm1026", .initfn = arm1026_initfn },
- /* What QEMU calls "arm1136-r2" is actually the 1136 r0p2, i.e. an
+ /*
+ * What QEMU calls "arm1136-r2" is actually the 1136 r0p2, i.e. an
* older core than plain "arm1136". In particular this does not
* have the v6K features.
*/
--
2.20.1
- [PULL 19/31] Cadence: gem: fix wraparound in 64bit descriptors, (continued)
- [PULL 19/31] Cadence: gem: fix wraparound in 64bit descriptors, Peter Maydell, 2020/04/30
- [PULL 20/31] net: cadence_gem: clear RX control descriptor, Peter Maydell, 2020/04/30
- [PULL 17/31] qdev-monitor: print the device's clock with info qtree, Peter Maydell, 2020/04/30
- [PULL 22/31] hw/arm/virt: dt: move creation of /secure-chosen to create_fdt(), Peter Maydell, 2020/04/30
- [PULL 21/31] target/arm: Vectorize integer comparison vs zero, Peter Maydell, 2020/04/30
- [PULL 23/31] hw/arm/virt: dt: add kaslr-seed property, Peter Maydell, 2020/04/30
- [PULL 24/31] target/arm: Restrict the Address Translate write operation to TCG accel, Peter Maydell, 2020/04/30
- [PULL 25/31] target/arm: Make cpu_register() available for other files, Peter Maydell, 2020/04/30
- [PULL 26/31] target/arm/cpu: Use ARRAY_SIZE() to iterate over ARMCPUInfo[], Peter Maydell, 2020/04/30
- [PULL 27/31] target/arm/cpu: Update coding style to make checkpatch.pl happy,
Peter Maydell <=
- [PULL 28/31] device_tree: Allow name wildcards in qemu_fdt_node_path(), Peter Maydell, 2020/04/30
- [PULL 29/31] device_tree: Constify compat in qemu_fdt_node_path(), Peter Maydell, 2020/04/30
- [PULL 31/31] hw/arm: xlnx-zcu102: Disable unsupported FDT firmware nodes, Peter Maydell, 2020/04/30
- [PULL 30/31] hw/arm: xlnx-zcu102: Move arm_boot_info into XlnxZCU102, Peter Maydell, 2020/04/30
- Re: [PULL 00/31] target-arm queue, no-reply, 2020/04/30