[RFC PATCH 3/8] riscv: Define riscv struct reginfo

[LIU Zhiwei]

Signed-off-by: LIU Zhiwei <address@hidden>
---
 risu_reginfo_riscv64.h | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)
 create mode 100644 risu_reginfo_riscv64.h

diff --git a/risu_reginfo_riscv64.h b/risu_reginfo_riscv64.h
new file mode 100644
index 0000000..7d365a8
--- /dev/null
+++ b/risu_reginfo_riscv64.h
@@ -0,0 +1,29 @@
+/******************************************************************************
+ * Copyright (c) 2020 PingTouGe Semiconductor
+ * All rights reserved. This program and the accompanying materials
+ * are made available under the terms of the Eclipse Public License v1.0
+ * which accompanies this distribution, and is available at
+ * http://www.eclipse.org/legal/epl-v10.html
+ *
+ * Contributors:
+ *     LIU Zhiwei(PingTouGe) - initial implementation
+ *     based on Peter Maydell's risu_arm.c
+ *****************************************************************************/
+
+#ifndef RISU_REGINFO_RISCV64_H
+#define RISU_REGINFO_RISCV64_H
+
+struct reginfo {
+    uint64_t fault_address;
+    uint64_t regs[32];
+    uint64_t fregs[32];
+    uint64_t sp;
+    uint64_t pc;
+    uint32_t flags;
+    uint32_t faulting_insn;
+
+    /* FP */
+    uint32_t fcsr;
+};
+
+#endif /* RISU_REGINFO_RISCV64_H */
-- 
2.23.0