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Re: [PATCH-for-5.1 v3 05/24] hw/arm/aspeed_ast2600: Move some code from
From: |
Cédric Le Goater |
Subject: |
Re: [PATCH-for-5.1 v3 05/24] hw/arm/aspeed_ast2600: Move some code from realize() to init() |
Date: |
Wed, 15 Apr 2020 09:50:54 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.6.0 |
On 4/13/20 12:36 AM, Philippe Mathieu-Daudé wrote:
> Coccinelle reported:
>
> $ spatch ... --timeout 60 --sp-file \
> scripts/coccinelle/simplify-init-realize-error_propagate.cocci
> HANDLING: ./hw/arm/aspeed_ast2600.c
> >>> possible moves from aspeed_soc_ast2600_init() to
> aspeed_soc_ast2600_realize() in ./hw/arm/aspeed_ast2600.c:243
>
> Move the calls using &error_fatal which don't depend on input
> updated before realize() to init().
>
> Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
> ---
> v3: Typo 'depend of' -> 'depend on' (eblake)
> ---
> hw/arm/aspeed_ast2600.c | 41 ++++++++++++++++++++---------------------
> 1 file changed, 20 insertions(+), 21 deletions(-)
>
> diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
> index a860ab6a35..64512f95c9 100644
> --- a/hw/arm/aspeed_ast2600.c
> +++ b/hw/arm/aspeed_ast2600.c
> @@ -114,6 +114,16 @@ static qemu_irq aspeed_soc_get_irq(AspeedSoCState *s,
> int ctrl)
> return qdev_get_gpio_in(DEVICE(&s->a7mpcore), sc->irqmap[ctrl]);
> }
>
> +/*
> + * ASPEED ast2600 has 0xf as cluster ID
> + *
> + *
> http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0388e/CIHEBGFG.html
> + */
> +static uint64_t aspeed_calc_affinity(int cpu)
> +{
> + return (0xf << ARM_AFF1_SHIFT) | cpu;
> +}
> +
> static void aspeed_soc_ast2600_init(Object *obj)
> {
> AspeedSoCState *s = ASPEED_SOC(obj);
> @@ -130,6 +140,13 @@ static void aspeed_soc_ast2600_init(Object *obj)
> object_initialize_child(obj, "cpu[*]", OBJECT(&s->cpu[i]),
> sizeof(s->cpu[i]), sc->cpu_type,
> &error_abort, NULL);
> + object_property_set_int(OBJECT(&s->cpu[i]), QEMU_PSCI_CONDUIT_SMC,
> + "psci-conduit", &error_abort);
> + object_property_set_int(OBJECT(&s->cpu[i]), aspeed_calc_affinity(i),
> + "mp-affinity", &error_abort);
> +
> + object_property_set_int(OBJECT(&s->cpu[i]), 1125000000, "cntfrq",
> + &error_abort);
> }
>
> snprintf(typename, sizeof(typename), "aspeed.scu-%s", socname);
> @@ -146,6 +163,9 @@ static void aspeed_soc_ast2600_init(Object *obj)
>
> sysbus_init_child_obj(obj, "a7mpcore", &s->a7mpcore,
> sizeof(s->a7mpcore), TYPE_A15MPCORE_PRIV);
> + object_property_set_int(OBJECT(&s->a7mpcore),
> + ASPEED_SOC_AST2600_MAX_IRQ + GIC_INTERNAL,
> + "num-irq", &error_abort);
>
> sysbus_init_child_obj(obj, "rtc", OBJECT(&s->rtc), sizeof(s->rtc),
> TYPE_ASPEED_RTC);
> @@ -230,16 +250,6 @@ static void aspeed_soc_ast2600_init(Object *obj)
> TYPE_SYSBUS_SDHCI);
> }
>
> -/*
> - * ASPEED ast2600 has 0xf as cluster ID
> - *
> - *
> http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0388e/CIHEBGFG.html
> - */
> -static uint64_t aspeed_calc_affinity(int cpu)
> -{
> - return (0xf << ARM_AFF1_SHIFT) | cpu;
> -}
> -
> static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
> {
> int i;
> @@ -264,19 +274,11 @@ static void aspeed_soc_ast2600_realize(DeviceState
> *dev, Error **errp)
>
> /* CPU */
> for (i = 0; i < s->num_cpus; i++) {
> - object_property_set_int(OBJECT(&s->cpu[i]), QEMU_PSCI_CONDUIT_SMC,
> - "psci-conduit", &error_abort);
> if (s->num_cpus > 1) {
> object_property_set_int(OBJECT(&s->cpu[i]),
> ASPEED_A7MPCORE_ADDR,
> "reset-cbar", &error_abort);
> }
> - object_property_set_int(OBJECT(&s->cpu[i]), aspeed_calc_affinity(i),
> - "mp-affinity", &error_abort);
> -
> - object_property_set_int(OBJECT(&s->cpu[i]), 1125000000, "cntfrq",
> - &error_abort);
> -
> /*
> * TODO: the secondary CPUs are started and a boot helper
> * is needed when using -kernel
> @@ -292,9 +294,6 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev,
> Error **errp)
> /* A7MPCORE */
> object_property_set_int(OBJECT(&s->a7mpcore), s->num_cpus, "num-cpu",
> &error_abort);
> - object_property_set_int(OBJECT(&s->a7mpcore),
> - ASPEED_SOC_AST2600_MAX_IRQ + GIC_INTERNAL,
> - "num-irq", &error_abort);
>
> object_property_set_bool(OBJECT(&s->a7mpcore), true, "realized",
> &error_abort);
>
- Re: [PATCH-for-5.1 v3 02/24] scripts/coccinelle: Script to simplify DeviceClass error propagation, (continued)
- [PATCH-for-5.1 v3 01/24] various: Remove suspicious '\' character outside of #define in C code, Philippe Mathieu-Daudé, 2020/04/12
- [PATCH-for-5.1 v3 03/24] hw/arm/allwinner-a10: Move some code from realize() to init(), Philippe Mathieu-Daudé, 2020/04/12
- [PATCH-for-5.1 v3 04/24] hw/arm/aspeed_ast2600: Simplify use of Error*, Philippe Mathieu-Daudé, 2020/04/12
- [PATCH-for-5.1 v3 05/24] hw/arm/aspeed_ast2600: Move some code from realize() to init(), Philippe Mathieu-Daudé, 2020/04/12
- Re: [PATCH-for-5.1 v3 05/24] hw/arm/aspeed_ast2600: Move some code from realize() to init(),
Cédric Le Goater <=
- [PATCH-for-5.1 v3 06/24] hw/arm/aspeed_soc: Move some code from realize() to init(), Philippe Mathieu-Daudé, 2020/04/12
- [PATCH-for-5.1 v3 07/24] hw/arm/aspeed_soc: Simplify use of Error*, Philippe Mathieu-Daudé, 2020/04/12
- [PATCH-for-5.1 v3 08/24] hw/arm/fsl-imx6: Simplify checks on 'smp_cpus' count, Philippe Mathieu-Daudé, 2020/04/12
- [PATCH-for-5.1 v3 09/24] hw/arm/fsl-imx6: Move some code from realize() to init(), Philippe Mathieu-Daudé, 2020/04/12
- [PATCH-for-5.1 v3 10/24] hw/arm/fsl-imx31: Move some code from realize() to init(), Philippe Mathieu-Daudé, 2020/04/12
- [PATCH-for-5.1 v3 11/24] hw/arm/msf2-soc: Store MemoryRegion in MSF2State, Philippe Mathieu-Daudé, 2020/04/12
- [PATCH-for-5.1 v3 12/24] hw/arm/stm32f205_soc: Store MemoryRegion in STM32F205State, Philippe Mathieu-Daudé, 2020/04/12
- [PATCH-for-5.1 v3 13/24] hw/arm/stm32f205_soc: Move some code from realize() to init(), Philippe Mathieu-Daudé, 2020/04/12