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[PATCH v7 47/48] nvme: change controller pci id
From: |
Klaus Jensen |
Subject: |
[PATCH v7 47/48] nvme: change controller pci id |
Date: |
Wed, 15 Apr 2020 07:51:39 +0200 |
From: Klaus Jensen <address@hidden>
There are two reasons for changing this:
1. The nvme device currently uses an internal Intel device id.
2. Since commits "nvme: fix write zeroes offset and count" and "nvme:
support multiple namespaces" the controller device no longer has
the quirks that the Linux kernel think it has.
As the quirks are applied based on pci vendor and device id, change
them to get rid of the quirks.
To keep backward compatibility, add a new 'x-use-intel-id' parameter to
the nvme device to force use of the Intel vendor and device id. This is
off by default but add a compat property to set this for machines 4.2
and older.
Signed-off-by: Klaus Jensen <address@hidden>
Reviewed-by: Keith Busch <address@hidden>
Reviewed-by: Maxim Levitsky <address@hidden>
---
hw/block/nvme.c | 13 +++++++++----
hw/block/nvme.h | 4 +++-
hw/core/machine.c | 1 +
3 files changed, 13 insertions(+), 5 deletions(-)
diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index e338d0893a70..40a400333828 100644
--- a/hw/block/nvme.c
+++ b/hw/block/nvme.c
@@ -2544,8 +2544,15 @@ static void nvme_init_pci(NvmeCtrl *n, PCIDevice
*pci_dev)
pci_conf[PCI_INTERRUPT_PIN] = 1;
pci_config_set_prog_interface(pci_conf, 0x2);
- pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL);
- pci_config_set_device_id(pci_conf, 0x5845);
+
+ if (n->params.use_intel_id) {
+ pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL);
+ pci_config_set_device_id(pci_conf, 0x5846);
+ } else {
+ pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_REDHAT);
+ pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_REDHAT_NVME);
+ }
+
pci_config_set_class(pci_conf, PCI_CLASS_STORAGE_EXPRESS);
pcie_endpoint_cap_init(pci_dev, 0x80);
@@ -2727,8 +2734,6 @@ static void nvme_class_init(ObjectClass *oc, void *data)
pc->realize = nvme_realize;
pc->exit = nvme_exit;
pc->class_id = PCI_CLASS_STORAGE_EXPRESS;
- pc->vendor_id = PCI_VENDOR_ID_INTEL;
- pc->device_id = 0x5845;
pc->revision = 2;
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
diff --git a/hw/block/nvme.h b/hw/block/nvme.h
index f42c17651b7b..615a6ff5d13d 100644
--- a/hw/block/nvme.h
+++ b/hw/block/nvme.h
@@ -13,7 +13,8 @@
DEFINE_PROP_UINT32("max_ioqpairs", _state, _props.max_ioqpairs, 64), \
DEFINE_PROP_UINT8("aerl", _state, _props.aerl, 3), \
DEFINE_PROP_UINT32("aer_max_queued", _state, _props.aer_max_queued, 64), \
- DEFINE_PROP_UINT8("mdts", _state, _props.mdts, 7)
+ DEFINE_PROP_UINT8("mdts", _state, _props.mdts, 7), \
+ DEFINE_PROP_BOOL("x-use-intel-id", _state, _props.use_intel_id, false)
typedef struct NvmeParams {
char *serial;
@@ -23,6 +24,7 @@ typedef struct NvmeParams {
uint8_t aerl;
uint32_t aer_max_queued;
uint8_t mdts;
+ bool use_intel_id;
} NvmeParams;
typedef struct NvmeAsyncEvent {
diff --git a/hw/core/machine.c b/hw/core/machine.c
index c1a444cb7558..de972a7e45dc 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -40,6 +40,7 @@ GlobalProperty hw_compat_4_2[] = {
{ "qxl", "revision", "4" },
{ "qxl-vga", "revision", "4" },
{ "fw_cfg", "acpi-mr-restore", "false" },
+ { "nvme", "x-use-intel-id", "on"},
};
const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2);
--
2.26.0
- [PATCH v7 26/48] nvme: remove redundant has_sg member, (continued)
- [PATCH v7 26/48] nvme: remove redundant has_sg member, Klaus Jensen, 2020/04/15
- [PATCH v7 30/48] nvme: verify validity of prp lists in the cmb, Klaus Jensen, 2020/04/15
- [PATCH v7 35/48] nvme: remove NvmeCmd parameter, Klaus Jensen, 2020/04/15
- [PATCH v7 36/48] nvme: allow multiple aios per command, Klaus Jensen, 2020/04/15
- [PATCH v7 37/48] nvme: add nvme_check_rw helper, Klaus Jensen, 2020/04/15
- [PATCH v7 39/48] pci: pass along the return value of dma_memory_rw, Klaus Jensen, 2020/04/15
- [PATCH v7 28/48] nvme: pass request along for tracing, Klaus Jensen, 2020/04/15
- [PATCH v7 44/48] nvme: refactor identify active namespace id list, Klaus Jensen, 2020/04/15
- [PATCH v7 41/48] nvme: harden cmb access, Klaus Jensen, 2020/04/15
- [PATCH v7 43/48] nvme: add support for sgl bit bucket descriptor, Klaus Jensen, 2020/04/15
- [PATCH v7 47/48] nvme: change controller pci id,
Klaus Jensen <=
- [PATCH v7 46/48] pci: allocate pci id for nvme, Klaus Jensen, 2020/04/15
- [PATCH v7 48/48] nvme: make lba data size configurable, Klaus Jensen, 2020/04/15
- [PATCH v7 42/48] nvme: add support for scatter gather lists, Klaus Jensen, 2020/04/15
- [PATCH v7 45/48] nvme: support multiple namespaces, Klaus Jensen, 2020/04/15
- Re: [PATCH v7 00/48] nvme: support NVMe v1.3d, SGLs and multiple namespaces, no-reply, 2020/04/15
- Re: [PATCH v7 00/48] nvme: support NVMe v1.3d, SGLs and multiple namespaces, no-reply, 2020/04/15