Re: [PATCH-for-5.0 3/7] hw/misc/grlib_ahb_apb_pnp: Fix AHB PnP 8-bit accesses

[KONRAD Frederic]

Le 3/31/20 à 12:50 PM, Philippe Mathieu-Daudé a écrit :
> The Plug & Play region of the AHB/APB bridge can be accessed
> by various word size, however the implementation is clearly
> restricted to 32-bit:
>
>    static uint64_t grlib_ahb_pnp_read(void *opaque, hwaddr offset, unsigned 
> size)
>    {
>        AHBPnp *ahb_pnp = GRLIB_AHB_PNP(opaque);
>
>        return ahb_pnp->regs[offset >> 2];
>    }
>
> Similarly to commit 0fbe394a64 with the APB PnP registers,
> set the MemoryRegionOps::impl min/max fields to 32-bit, so
> memory.c::access_with_adjusted_size() can adjust when the
> access is not 32-bit.
>
> Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
> ---
>   hw/misc/grlib_ahb_apb_pnp.c | 4 ++++
>   1 file changed, 4 insertions(+)
>
> diff --git a/hw/misc/grlib_ahb_apb_pnp.c b/hw/misc/grlib_ahb_apb_pnp.c
> index 72a8764776..d22ed00206 100644
> --- a/hw/misc/grlib_ahb_apb_pnp.c
> +++ b/hw/misc/grlib_ahb_apb_pnp.c
> @@ -146,6 +146,10 @@ static const MemoryRegionOps grlib_ahb_pnp_ops = {
>       .read       = grlib_ahb_pnp_read,
>       .write      = grlib_ahb_pnp_write,
>       .endianness = DEVICE_BIG_ENDIAN,
> +    .impl = {
> +        .min_access_size = 4,
> +        .max_access_size = 4,
> +    },
>   };
>   
>   static void grlib_ahb_pnp_realize(DeviceState *dev, Error **errp)

Reviewed-by: KONRAD Frederic <address@hidden>