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RE: [PATCH v1 14/22] intel_iommu: bind/unbind guest page table to host
From: |
Liu, Yi L |
Subject: |
RE: [PATCH v1 14/22] intel_iommu: bind/unbind guest page table to host |
Date: |
Wed, 25 Mar 2020 12:47:26 +0000 |
> From: Peter Xu <address@hidden>
> Sent: Wednesday, March 25, 2020 1:47 AM
> To: Liu, Yi L <address@hidden>
> Sent: Wednesday, March 25, 2020 1:47 AM
> Subject: Re: [PATCH v1 14/22] intel_iommu: bind/unbind guest page table to
> host
>
> On Sun, Mar 22, 2020 at 05:36:11AM -0700, Liu Yi L wrote:
> > This patch captures the guest PASID table entry modifications and
> > propagates the changes to host to setup dual stage DMA translation.
> > The guest page table is configured as 1st level page table (GVA->GPA)
> > whose translation result would further go through host VT-d 2nd level
> > page table(GPA->HPA) under nested translation mode. This is the key
> > part of vSVA support, and also a key to support IOVA over 1st- level
> > page table for Intel VT-d in virtualization environment.
> >
> > Cc: Kevin Tian <address@hidden>
> > Cc: Jacob Pan <address@hidden>
> > Cc: Peter Xu <address@hidden>
> > Cc: Yi Sun <address@hidden>
> > Cc: Paolo Bonzini <address@hidden>
> > Cc: Richard Henderson <address@hidden>
> > Signed-off-by: Liu Yi L <address@hidden>
> > ---
> > hw/i386/intel_iommu.c | 98
> +++++++++++++++++++++++++++++++++++++++---
> > hw/i386/intel_iommu_internal.h | 25 +++++++++++
> > 2 files changed, 118 insertions(+), 5 deletions(-)
> >
> > diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index
> > c985cae..0423c83 100644
> > --- a/hw/i386/intel_iommu.c
> > +++ b/hw/i386/intel_iommu.c
> > @@ -41,6 +41,7 @@
> > #include "migration/vmstate.h"
> > #include "trace.h"
> > #include "qemu/jhash.h"
> > +#include <linux/iommu.h>
> >
> > /* context entry operations */
> > #define VTD_CE_GET_RID2PASID(ce) \
> > @@ -695,6 +696,16 @@ static inline uint16_t
> vtd_pe_get_domain_id(VTDPASIDEntry *pe)
> > return VTD_SM_PASID_ENTRY_DID((pe)->val[1]);
> > }
> >
[...]
> > +
> > + bind_data = g_malloc0(sizeof(*bind_data));
> > + bind_data->pasid = pasid;
> > + g_bind_data = &bind_data->bind_data.gpasid_bind;
> > +
> > + g_bind_data->flags = 0;
> > + g_bind_data->vtd.flags = 0;
> > + switch (op) {
> > + case VTD_PASID_BIND:
> > + case VTD_PASID_UPDATE:
>
> Is VTD_PASID_UPDATE used anywhere?
Hmmm, there is update case in the code. But, this macro is not
used explicitly in this patch. Maybe I should drop it.
Regards,
Yi Liu
- Re: [PATCH v1 12/22] intel_iommu: add PASID cache management infrastructure, (continued)
- Re: [PATCH v1 12/22] intel_iommu: add PASID cache management infrastructure, Peter Xu, 2020/03/25
- RE: [PATCH v1 12/22] intel_iommu: add PASID cache management infrastructure, Liu, Yi L, 2020/03/26
- RE: [PATCH v1 12/22] intel_iommu: add PASID cache management infrastructure, Liu, Yi L, 2020/03/26
- Re: [PATCH v1 12/22] intel_iommu: add PASID cache management infrastructure, Peter Xu, 2020/03/26
- RE: [PATCH v1 12/22] intel_iommu: add PASID cache management infrastructure, Liu, Yi L, 2020/03/26
[PATCH v1 14/22] intel_iommu: bind/unbind guest page table to host, Liu Yi L, 2020/03/22
RE: [PATCH v1 14/22] intel_iommu: bind/unbind guest page table to host,
Liu, Yi L <=
[PATCH v1 13/22] vfio: add bind stage-1 page table support, Liu Yi L, 2020/03/22
[PATCH v1 19/22] intel_iommu: process PASID-based iotlb invalidation, Liu Yi L, 2020/03/22
[PATCH v1 18/22] vfio: add support for flush iommu stage-1 cache, Liu Yi L, 2020/03/22