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[PULL 31/45] ppc/spapr: Move GPRs setup to one place
From: |
David Gibson |
Subject: |
[PULL 31/45] ppc/spapr: Move GPRs setup to one place |
Date: |
Tue, 17 Mar 2020 21:04:09 +1100 |
From: Alexey Kardashevskiy <address@hidden>
At the moment "pseries" starts in SLOF which only expects the FDT blob
pointer in r3. As we are going to introduce a OpenFirmware support in
QEMU, we will be booting OF clients directly and these expect a stack
pointer in r1, Linux looks at r3/r4 for the initramdisk location
(although vmlinux can find this from the device tree but zImage from
distro kernels cannot).
This extends spapr_cpu_set_entry_state() to take more registers. This
should cause no behavioral change.
Signed-off-by: Alexey Kardashevskiy <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Greg Kurz <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/spapr.c | 2 +-
hw/ppc/spapr_cpu_core.c | 6 +++++-
hw/ppc/spapr_rtas.c | 2 +-
include/hw/ppc/spapr_cpu_core.h | 4 +++-
4 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 1950fc303e..1038420c4a 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -1698,7 +1698,7 @@ static void spapr_machine_reset(MachineState *machine)
spapr->fdt_blob = fdt;
/* Set up the entry state */
- spapr_cpu_set_entry_state(first_ppc_cpu, SPAPR_ENTRY_POINT, fdt_addr);
+ spapr_cpu_set_entry_state(first_ppc_cpu, SPAPR_ENTRY_POINT, 0, fdt_addr,
0);
first_ppc_cpu->env.gpr[5] = 0;
spapr->cas_reboot = false;
diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
index 36ed3a2b66..ac1c109427 100644
--- a/hw/ppc/spapr_cpu_core.c
+++ b/hw/ppc/spapr_cpu_core.c
@@ -76,13 +76,17 @@ static void spapr_reset_vcpu(PowerPCCPU *cpu)
spapr_irq_cpu_intc_reset(spapr, cpu);
}
-void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip, target_ulong
r3)
+void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip,
+ target_ulong r1, target_ulong r3,
+ target_ulong r4)
{
PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
CPUPPCState *env = &cpu->env;
env->nip = nip;
+ env->gpr[1] = r1;
env->gpr[3] = r3;
+ env->gpr[4] = r4;
kvmppc_set_reg_ppc_online(cpu, 1);
CPU(cpu)->halted = 0;
/* Enable Power-saving mode Exit Cause exceptions */
diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
index 656fdd2216..fe83b50c66 100644
--- a/hw/ppc/spapr_rtas.c
+++ b/hw/ppc/spapr_rtas.c
@@ -190,7 +190,7 @@ static void rtas_start_cpu(PowerPCCPU *callcpu,
SpaprMachineState *spapr,
*/
newcpu->env.tb_env->tb_offset = callcpu->env.tb_env->tb_offset;
- spapr_cpu_set_entry_state(newcpu, start, r3);
+ spapr_cpu_set_entry_state(newcpu, start, 0, r3, 0);
qemu_cpu_kick(CPU(newcpu));
diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_core.h
index 1c4cc6559c..7aed8f555b 100644
--- a/include/hw/ppc/spapr_cpu_core.h
+++ b/include/hw/ppc/spapr_cpu_core.h
@@ -40,7 +40,9 @@ typedef struct SpaprCpuCoreClass {
} SpaprCpuCoreClass;
const char *spapr_get_cpu_core_type(const char *cpu_type);
-void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip, target_ulong
r3);
+void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip,
+ target_ulong r1, target_ulong r3,
+ target_ulong r4);
typedef struct SpaprCpuState {
uint64_t vpa_addr;
--
2.24.1
- [PULL 16/45] target/ppc: Don't store VRMA SLBE persistently, (continued)
- [PULL 16/45] target/ppc: Don't store VRMA SLBE persistently, David Gibson, 2020/03/17
- [PULL 15/45] target/ppc: Only calculate RMLS derived RMA limit on demand, David Gibson, 2020/03/17
- [PULL 17/45] spapr: Don't use weird units for MIN_RMA_SLOF, David Gibson, 2020/03/17
- [PULL 18/45] spapr,ppc: Simplify signature of kvmppc_rma_size(), David Gibson, 2020/03/17
- [PULL 20/45] spapr: Don't clamp RMA to 16GiB on new machine types, David Gibson, 2020/03/17
- [PULL 23/45] hw/scsi/spapr_vscsi: Use SRP_MAX_IU_LEN instead of sizeof flexible array, David Gibson, 2020/03/17
- [PULL 19/45] spapr: Don't attempt to clamp RMA to VRMA constraint, David Gibson, 2020/03/17
- [PULL 24/45] hw/scsi/spapr_vscsi: Simplify a bit, David Gibson, 2020/03/17
- [PULL 01/45] pseries: Update SLOF firmware image, David Gibson, 2020/03/17
- [PULL 27/45] hw/scsi/spapr_vscsi: Prevent buffer overflow, David Gibson, 2020/03/17
- [PULL 31/45] ppc/spapr: Move GPRs setup to one place,
David Gibson <=
- [PULL 22/45] hw/scsi/viosrp: Add missing 'hw/scsi/srp.h' include, David Gibson, 2020/03/17
- [PULL 28/45] hw/scsi/spapr_vscsi: Convert debug fprintf() to trace event, David Gibson, 2020/03/17
- [PULL 26/45] hw/scsi/spapr_vscsi: Do not mix SRP IU size with DMA buffer size, David Gibson, 2020/03/17
- [PULL 21/45] spapr: Clean up RMA size calculation, David Gibson, 2020/03/17
- [PULL 25/45] hw/scsi/spapr_vscsi: Introduce req_iu() helper, David Gibson, 2020/03/17
- [PULL 29/45] spapr/xive: use SPAPR_IRQ_IPI to define IPI ranges exposed to the guest, David Gibson, 2020/03/17
- [PULL 36/45] spapr: Rename DT functions to newer naming convention, David Gibson, 2020/03/17
- [PULL 30/45] target/ppc: Fix rlwinm on ppc64, David Gibson, 2020/03/17
- [PULL 40/45] ppc/spapr: Fix FWNMI machine check interrupt delivery, David Gibson, 2020/03/17
- [PULL 33/45] spapr/rtas: Reserve space for RTAS blob and log, David Gibson, 2020/03/17