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[PATCH v6 22/42] target/arm: Move regime_tcr to internals.h
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From: |
Richard Henderson |
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Subject: |
[PATCH v6 22/42] target/arm: Move regime_tcr to internals.h |
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Date: |
Thu, 12 Mar 2020 12:41:59 -0700 |
We will shortly need this in mte_helper.c as well.
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/internals.h | 9 +++++++++
target/arm/helper.c | 9 ---------
2 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/target/arm/internals.h b/target/arm/internals.h
index f091891312..56fb07f2b6 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -948,6 +948,15 @@ static inline uint32_t regime_el(CPUARMState *env,
ARMMMUIdx mmu_idx)
}
}
+/* Return the TCR controlling this translation regime */
+static inline TCR *regime_tcr(CPUARMState *env, ARMMMUIdx mmu_idx)
+{
+ if (mmu_idx == ARMMMUIdx_Stage2) {
+ return &env->cp15.vtcr_el2;
+ }
+ return &env->cp15.tcr_el[regime_el(env, mmu_idx)];
+}
+
/* Return the FSR value for a debug exception (watchpoint, hardware
* breakpoint or BKPT insn) targeting the specified exception level.
*/
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 2a50d4e9a2..e4b4366af7 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -9835,15 +9835,6 @@ static inline uint64_t regime_ttbr(CPUARMState *env,
ARMMMUIdx mmu_idx,
#endif /* !CONFIG_USER_ONLY */
-/* Return the TCR controlling this translation regime */
-static inline TCR *regime_tcr(CPUARMState *env, ARMMMUIdx mmu_idx)
-{
- if (mmu_idx == ARMMMUIdx_Stage2) {
- return &env->cp15.vtcr_el2;
- }
- return &env->cp15.tcr_el[regime_el(env, mmu_idx)];
-}
-
/* Convert a possible stage1+2 MMU index into the appropriate
* stage 1 MMU index
*/
--
2.20.1
- [PATCH v6 08/42] target/arm: Add MTE bits to tb_flags, (continued)
- [PATCH v6 08/42] target/arm: Add MTE bits to tb_flags, Richard Henderson, 2020/03/12
- [PATCH v6 11/42] target/arm: Implement the GMI instruction, Richard Henderson, 2020/03/12
- [PATCH v6 10/42] target/arm: Implement the ADDG, SUBG instructions, Richard Henderson, 2020/03/12
- [PATCH v6 09/42] target/arm: Implement the IRG instruction, Richard Henderson, 2020/03/12
- [PATCH v6 14/42] target/arm: Add helper_probe_access, Richard Henderson, 2020/03/12
- [PATCH v6 12/42] target/arm: Implement the SUBP instruction, Richard Henderson, 2020/03/12
- [PATCH v6 13/42] target/arm: Define arm_cpu_do_unaligned_access for user-only, Richard Henderson, 2020/03/12
- [PATCH v6 15/42] target/arm: Implement LDG, STG, ST2G instructions, Richard Henderson, 2020/03/12
- [PATCH v6 16/42] target/arm: Implement the STGP instruction, Richard Henderson, 2020/03/12
- [PATCH v6 17/42] target/arm: Restrict the values of DCZID.BS under TCG, Richard Henderson, 2020/03/12
- [PATCH v6 22/42] target/arm: Move regime_tcr to internals.h,
Richard Henderson <=
- [PATCH v6 21/42] target/arm: Move regime_el to internals.h, Richard Henderson, 2020/03/12
- [PATCH v6 20/42] target/arm: Implement the access tag cache flushes, Richard Henderson, 2020/03/12
- [PATCH v6 23/42] target/arm: Add gen_mte_check1, Richard Henderson, 2020/03/12
- [PATCH v6 24/42] target/arm: Add gen_mte_checkN, Richard Henderson, 2020/03/12
- [PATCH v6 19/42] target/arm: Implement the LDGM, STGM, STZGM instructions, Richard Henderson, 2020/03/12
- [PATCH v6 18/42] target/arm: Simplify DC_ZVA, Richard Henderson, 2020/03/12
- [PATCH v6 25/42] target/arm: Implement helper_mte_check1, Richard Henderson, 2020/03/12
- [PATCH v6 27/42] target/arm: Add helper_mte_check_zva, Richard Henderson, 2020/03/12
- [PATCH v6 26/42] target/arm: Implement helper_mte_checkN, Richard Henderson, 2020/03/12
- [PATCH v6 28/42] target/arm: Use mte_checkN for sve unpredicated loads, Richard Henderson, 2020/03/12