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Re: [PATCH] hw/ide: Remove status register read side effect


From: BALATON Zoltan
Subject: Re: [PATCH] hw/ide: Remove status register read side effect
Date: Wed, 4 Mar 2020 09:48:35 +0100 (CET)
User-agent: Alpine 2.22 (BSF 395 2020-01-19)

On Wed, 4 Mar 2020, address@hidden wrote:
cmd646_update_irq() only seems to raise PCI interrupt, should it also
have
an option to use INT 14 and 15 in legacy mode similar to what my
patch
does for via-ide?

Looking through /qemu/hw/ide/cmd646.c it doesn't look like QEMU has
support for legacy mode. At the very least, it looks like we default to
PCI native mode:

static void pci_cmd646_ide_realize(PCIDevice *dev, Error **errp)
        ...
        pci_conf[PCI_CLASS_PROG] = 0x8f;
        ...

To add support for legacy mode it would require changing
cmd646_update_irq() and maybe cmd646_set_irq() so that interrupts are
conditionally raised on IRQ14 and/or IRQ15 when the ports are in legacy
mode.

Ah yes, same problem as with via-ide. With current ISA IDE and PCI device emulation code in QEMU it's not easy to emulate both modes but maybe we don't need that either. (So we can avoid changing ISA and PCI QEMU parts that are widely used and risk breaking something else by that.) The Solaris driver does seem to use native mode because it could find io addresses in PCI BARs to talk to the controller just did not get interrupts if I got that right. Then maybe PCI interrupts are not routed as expected by the driver which could be due to

- difference in PCI bridge emulation,
- where the controller is connected
- or how firmware describes it in device tree
- or how it configures it

compared to real hardware. Unless it also has some pecularity similar to pegasos2 with native mode and ISA interrupts. Checking on real hardware should reveal these differences so maybe that's the best way to find out. As for seeing what the firmware does Sun's OpenBoot is open sourced so maybe what that does could be checked but probably not easy to find out in Forth.

Here are a few Linux logs I've found that suggest on a Sun Ultra 5/10 IDE is on irq 4 for both channels, but not sure how PCI interrupt ends up there though. Does that match what QEMU does?

http://gavinduley.org/interests/computing/sundmesg.html
https://lists.debian.org/debian-boot/2004/10/msg00864.html
https://forums.gentoo.org/viewtopic-t-473614-start-0.html

Regards,
BALATON Zoltan



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