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[RFC PATCH v2 06/67] Hexagon Disassembler
From: |
Taylor Simpson |
Subject: |
[RFC PATCH v2 06/67] Hexagon Disassembler |
Date: |
Fri, 28 Feb 2020 10:43:02 -0600 |
The Hexagon disassembler calls disassemble_hexagon to decode a packet
and format it for printing
Signed-off-by: Taylor Simpson <address@hidden>
---
include/disas/dis-asm.h | 1 +
disas/hexagon.c | 62 +++++++++++++++++++++++++++++++++++++++++++++++++
disas/Makefile.objs | 1 +
3 files changed, 64 insertions(+)
create mode 100644 disas/hexagon.c
diff --git a/include/disas/dis-asm.h b/include/disas/dis-asm.h
index f87f468..a7fa82d 100644
--- a/include/disas/dis-asm.h
+++ b/include/disas/dis-asm.h
@@ -436,6 +436,7 @@ int print_insn_little_nios2 (bfd_vma,
disassemble_info*);
int print_insn_xtensa (bfd_vma, disassemble_info*);
int print_insn_riscv32 (bfd_vma, disassemble_info*);
int print_insn_riscv64 (bfd_vma, disassemble_info*);
+int print_insn_hexagon (bfd_vma, disassemble_info*);
#if 0
/* Fetch the disassembler for a given BFD, if that support is available. */
diff --git a/disas/hexagon.c b/disas/hexagon.c
new file mode 100644
index 0000000..6ee8653
--- /dev/null
+++ b/disas/hexagon.c
@@ -0,0 +1,62 @@
+/*
+ * Copyright(c) 2019-2020 Qualcomm Innovation Center, Inc. All Rights
Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+/*
+ * QEMU Hexagon Disassembler
+ */
+
+#include "qemu/osdep.h"
+#include "disas/dis-asm.h"
+#include "target/hexagon/cpu_bits.h"
+
+/*
+ * We will disassemble a packet with up to 4 instructions, so we need
+ * a hefty size buffer.
+ */
+#define PACKET_BUFFER_LEN 1028
+
+int print_insn_hexagon(bfd_vma memaddr, struct disassemble_info *info)
+{
+ uint32_t words[PACKET_WORDS_MAX];
+ int len, slen;
+ char buf[PACKET_BUFFER_LEN];
+ int status;
+ int i;
+
+ for (i = 0; i < PACKET_WORDS_MAX; i++) {
+ status = (*info->read_memory_func)(memaddr + i * sizeof(uint32_t),
+ (bfd_byte *)&words[i],
+ sizeof(uint32_t), info);
+ if (status) {
+ if (i > 0) {
+ break;
+ }
+ (*info->memory_error_func)(status, memaddr, info);
+ return status;
+ }
+ }
+
+ len = disassemble_hexagon(words, i, buf, PACKET_BUFFER_LEN);
+ slen = strlen(buf);
+ if (buf[slen - 1] == '\n') {
+ buf[slen - 1] = '\0';
+ }
+ (*info->fprintf_func)(info->stream, "%s", buf);
+
+ return len;
+}
+
diff --git a/disas/Makefile.objs b/disas/Makefile.objs
index 3c1cdce..0e86964 100644
--- a/disas/Makefile.objs
+++ b/disas/Makefile.objs
@@ -24,6 +24,7 @@ common-obj-$(CONFIG_SH4_DIS) += sh4.o
common-obj-$(CONFIG_SPARC_DIS) += sparc.o
common-obj-$(CONFIG_LM32_DIS) += lm32.o
common-obj-$(CONFIG_XTENSA_DIS) += xtensa.o
+common-obj-$(CONFIG_HEXAGON_DIS) += hexagon.o
# TODO: As long as the TCG interpreter and its generated code depend
# on the QEMU target, we cannot compile the disassembler here.
--
2.7.4
- [RFC PATCH v2 31/67] Hexagon macros to interface with the generator, (continued)
- [RFC PATCH v2 31/67] Hexagon macros to interface with the generator, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 14/67] Hexagon instruction/packet decode, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 33/67] Hexagon instruction classes, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 41/67] Hexagon TCG generation - step 03, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 16/67] Hexagon arch import - instruction semantics definitions, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 59/67] Hexagon HVX semantics generator, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 28/67] Hexagon generator phase 3 - C preprocessor for decode tree, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 37/67] Hexagon TCG generation helpers - step 4, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 38/67] Hexagon TCG generation helpers - step 5, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 22/67] Hexagon generator phase 2 - qemu_def_generated.h, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 06/67] Hexagon Disassembler,
Taylor Simpson <=
- [RFC PATCH v2 47/67] Hexagon TCG generation - step 09, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 32/67] Hexagon macros referenced in instruction semantics, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 62/67] Hexagon HVX macros to interface with the generator, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 48/67] Hexagon TCG generation - step 10, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 26/67] Hexagon generator phase 2 - op_regs_generated.h, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 58/67] Hexagon HVX import macro definitions, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 60/67] Hexagon HVX instruction decoding, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 63/67] Hexagon HVX macros referenced in instruction semantics, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 39/67] Hexagon TCG generation - step 01, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 52/67] Hexagon Linux user emulation, Taylor Simpson, 2020/02/28