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[RFC PATCH v2 19/67] Hexagon instruction class definitions
From: |
Taylor Simpson |
Subject: |
[RFC PATCH v2 19/67] Hexagon instruction class definitions |
Date: |
Fri, 28 Feb 2020 10:43:15 -0600 |
Imported from the Hexagon architecture library
Signed-off-by: Taylor Simpson <address@hidden>
---
target/hexagon/imported/iclass.def | 52 ++++++++++++++++++++++++++++++++++++++
1 file changed, 52 insertions(+)
create mode 100644 target/hexagon/imported/iclass.def
diff --git a/target/hexagon/imported/iclass.def
b/target/hexagon/imported/iclass.def
new file mode 100644
index 0000000..4ef725f
--- /dev/null
+++ b/target/hexagon/imported/iclass.def
@@ -0,0 +1,52 @@
+/*
+ * Copyright(c) 2019-2020 Qualcomm Innovation Center, Inc. All Rights
Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+/* DEF_*(TYPE,SLOTS,UNITS) */
+DEF_PP_ICLASS32(EXTENDER,0123,LDST|SUNIT|MUNIT) /* 0 */
+DEF_PP_ICLASS32(CJ,0123,CTRLFLOW) /* 1 */
+DEF_PP_ICLASS32(NCJ,01,LDST|CTRLFLOW) /* 2 */
+DEF_PP_ICLASS32(V4LDST,01,LDST) /* 3 */
+DEF_PP_ICLASS32(V2LDST,01,LDST) /* 4 */
+DEF_PP_ICLASS32(J,0123,CTRLFLOW) /* 5 */
+DEF_PP_ICLASS32(CR,3,SUNIT) /* 6 */
+DEF_PP_ICLASS32(ALU32_2op,0123,LDST|SUNIT|MUNIT) /* 7 */
+DEF_PP_ICLASS32(S_2op,23,SUNIT|MUNIT) /* 8 */
+DEF_PP_ICLASS32(LD,01,LDST) /* 9 */
+DEF_PP_ICLASS32(ST,01,LDST) /* 10 */
+DEF_PP_ICLASS32(ALU32_ADDI,0123,LDST|SUNIT|MUNIT) /* 11 */
+DEF_PP_ICLASS32(S_3op,23,SUNIT|MUNIT) /* 12 */
+DEF_PP_ICLASS32(ALU64,23,SUNIT|MUNIT) /* 13 */
+DEF_PP_ICLASS32(M,23,SUNIT|MUNIT) /* 14 */
+DEF_PP_ICLASS32(ALU32_3op,0123,LDST|SUNIT|MUNIT) /* 15 */
+
+DEF_EE_ICLASS32(EE0,01,INVALID) /* 0 */
+DEF_EE_ICLASS32(EE1,01,INVALID) /* 1 */
+DEF_EE_ICLASS32(EE2,01,INVALID) /* 2 */
+DEF_EE_ICLASS32(EE3,01,INVALID) /* 3 */
+DEF_EE_ICLASS32(EE4,01,INVALID) /* 4 */
+DEF_EE_ICLASS32(EE5,01,INVALID) /* 5 */
+DEF_EE_ICLASS32(EE6,01,INVALID) /* 6 */
+DEF_EE_ICLASS32(EE7,01,INVALID) /* 7 */
+DEF_EE_ICLASS32(EE8,01,INVALID) /* 8 */
+DEF_EE_ICLASS32(EE9,01,INVALID) /* 9 */
+DEF_EE_ICLASS32(EEA,01,INVALID) /* 10 */
+DEF_EE_ICLASS32(EEB,01,INVALID) /* 11 */
+DEF_EE_ICLASS32(EEC,01,INVALID) /* 12 */
+DEF_EE_ICLASS32(EED,01,INVALID) /* 13 */
+DEF_EE_ICLASS32(EEE,01,INVALID) /* 14 */
+DEF_EE_ICLASS32(EEF,01,INVALID) /* 15 */
+
--
2.7.4
- [RFC PATCH v2 20/67] Hexagon instruction utility functions, (continued)
- [RFC PATCH v2 20/67] Hexagon instruction utility functions, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 24/67] Hexagon generator phase 2 - opcodes_def_generated.h, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 04/67] Hexagon CPU Scalar Core Definition, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 11/67] Hexagon register fields, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 01/67] Hexagon Maintainers, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 08/67] Hexagon GDB Stub, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 10/67] Hexagon instruction and packet types, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 03/67] Hexagon ELF Machine Definition, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 21/67] Hexagon generator phase 1 - C preprocessor for semantics, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 27/67] Hexagon generator phase 2 - printinsn-generated.h, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 19/67] Hexagon instruction class definitions,
Taylor Simpson <=
- [RFC PATCH v2 07/67] Hexagon CPU Scalar Core Helpers, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 13/67] Hexagon register map, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 02/67] Hexagon README, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 23/67] Hexagon generator phase 2 - qemu_wrap_generated.h, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 25/67] Hexagon generator phase 2 - op_attribs_generated.h, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 29/67] Hexagon generater phase 4 - Decode tree, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 18/67] Hexagon arch import - instruction encoding, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 44/67] Hexagon TCG generation - step 06, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 31/67] Hexagon macros to interface with the generator, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 14/67] Hexagon instruction/packet decode, Taylor Simpson, 2020/02/28