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[PULL 29/33] target/arm: Fix wrong use of FIELD_EX32 on ID_AA64DFR0


From: Peter Maydell
Subject: [PULL 29/33] target/arm: Fix wrong use of FIELD_EX32 on ID_AA64DFR0
Date: Fri, 28 Feb 2020 16:38:36 +0000

We missed an instance of using FIELD_EX32 on a 64-bit ID
register, in isar_feature_aa64_pmu_8_4(). Fix it.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
---
 target/arm/cpu.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 05aa9711cd8..6013287f623 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -3770,8 +3770,8 @@ static inline bool isar_feature_aa64_pmu_8_1(const 
ARMISARegisters *id)
 
 static inline bool isar_feature_aa64_pmu_8_4(const ARMISARegisters *id)
 {
-    return FIELD_EX32(id->id_aa64dfr0, ID_AA64DFR0, PMUVER) >= 5 &&
-        FIELD_EX32(id->id_aa64dfr0, ID_AA64DFR0, PMUVER) != 0xf;
+    return FIELD_EX64(id->id_aa64dfr0, ID_AA64DFR0, PMUVER) >= 5 &&
+        FIELD_EX64(id->id_aa64dfr0, ID_AA64DFR0, PMUVER) != 0xf;
 }
 
 /*
-- 
2.20.1




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