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[PULL 09/33] target/arm: Add isar_feature_aa32_{fpsp_v2, fpsp_v3, fpdp_v
From: |
Peter Maydell |
Subject: |
[PULL 09/33] target/arm: Add isar_feature_aa32_{fpsp_v2, fpsp_v3, fpdp_v3} |
Date: |
Fri, 28 Feb 2020 16:38:16 +0000 |
From: Richard Henderson <address@hidden>
We will shortly use these to test for VFPv2 and VFPv3
in different situations.
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/cpu.h | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 1e6eac0cd2a..f7a90f512e3 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -3470,12 +3470,30 @@ static inline bool isar_feature_aa32_fpshvec(const
ARMISARegisters *id)
return FIELD_EX32(id->mvfr0, MVFR0, FPSHVEC) > 0;
}
+static inline bool isar_feature_aa32_fpsp_v2(const ARMISARegisters *id)
+{
+ /* Return true if CPU supports single precision floating point, VFPv2 */
+ return FIELD_EX32(id->mvfr0, MVFR0, FPSP) > 0;
+}
+
+static inline bool isar_feature_aa32_fpsp_v3(const ARMISARegisters *id)
+{
+ /* Return true if CPU supports single precision floating point, VFPv3 */
+ return FIELD_EX32(id->mvfr0, MVFR0, FPSP) >= 2;
+}
+
static inline bool isar_feature_aa32_fpdp_v2(const ARMISARegisters *id)
{
/* Return true if CPU supports double precision floating point, VFPv2 */
return FIELD_EX32(id->mvfr0, MVFR0, FPDP) > 0;
}
+static inline bool isar_feature_aa32_fpdp_v3(const ARMISARegisters *id)
+{
+ /* Return true if CPU supports double precision floating point, VFPv3 */
+ return FIELD_EX32(id->mvfr0, MVFR0, FPDP) >= 2;
+}
+
/*
* We always set the FP and SIMD FP16 fields to indicate identical
* levels of support (assuming SIMD is implemented at all), so
--
2.20.1
- [PULL 00/33] target-arm queue, Peter Maydell, 2020/02/28
- [PULL 01/33] hw/arm: Use TYPE_PL011 to create serial port, Peter Maydell, 2020/02/28
- [PULL 02/33] target/arm: Set ID_MMFR4.HPDS for aarch64_max_initfn, Peter Maydell, 2020/02/28
- [PULL 03/33] hw/arm/integratorcp: Map the audio codec controller, Peter Maydell, 2020/02/28
- [PULL 04/33] arm_gic: Mask the un-supported priority bits, Peter Maydell, 2020/02/28
- [PULL 08/33] target/arm: Rename isar_feature_aa32_fpdp_v2, Peter Maydell, 2020/02/28
- [PULL 06/33] cpu/arm11mpcore: Set number of GIC priority bits to 4, Peter Maydell, 2020/02/28
- [PULL 07/33] target/arm: Add isar_feature_aa32_vfp_simd, Peter Maydell, 2020/02/28
- [PULL 09/33] target/arm: Add isar_feature_aa32_{fpsp_v2, fpsp_v3, fpdp_v3},
Peter Maydell <=
- [PULL 11/33] target/arm: Perform fpdp_v2 check first, Peter Maydell, 2020/02/28
- [PULL 12/33] target/arm: Replace ARM_FEATURE_VFP3 checks with fp{sp, dp}_v3, Peter Maydell, 2020/02/28
- [PULL 13/33] target/arm: Add missing checks for fpsp_v2, Peter Maydell, 2020/02/28
- [PULL 14/33] target/arm: Replace ARM_FEATURE_VFP4 with isar_feature_aa32_simdfmac, Peter Maydell, 2020/02/28
- [PULL 15/33] target/arm: Remove ARM_FEATURE_VFP check from disas_vfp_insn, Peter Maydell, 2020/02/28
- [PULL 16/33] target/arm: Move VLLDM and VLSTM to vfp.decode, Peter Maydell, 2020/02/28
- [PULL 24/33] hw/usb/hcd-ehci-sysbus: Remove obsolete xlnx, ps7-usb class, Peter Maydell, 2020/02/28
- [PULL 29/33] target/arm: Fix wrong use of FIELD_EX32 on ID_AA64DFR0, Peter Maydell, 2020/02/28
- [PULL 10/33] target/arm: Add isar_feature_aa64_fp_simd, isar_feature_aa32_vfp, Peter Maydell, 2020/02/28
- [PULL 18/33] linux-user/arm: Replace ARM_FEATURE_VFP* tests for HWCAP, Peter Maydell, 2020/02/28