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Re: [PATCH v5 2/4] target/riscv: implementation-defined constant paramet


From: Richard Henderson
Subject: Re: [PATCH v5 2/4] target/riscv: implementation-defined constant parameters
Date: Thu, 27 Feb 2020 12:33:58 -0800
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1

On 2/21/20 1:45 AM, LIU Zhiwei wrote:
> vlen is the vector register length in bits.
> elen is the max element size in bits.
> vext_spec is the vector specification version, default value is v0.7.1.
> 
> Signed-off-by: LIU Zhiwei <address@hidden>
> ---
>  target/riscv/cpu.c | 7 +++++++
>  target/riscv/cpu.h | 5 +++++
>  2 files changed, 12 insertions(+)

Reviewed-by: Richard Henderson <address@hidden>


r~



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