Re: [PATCH v6 10/18] target/ppc: Correct RMLS table

[Greg Kurz]

On Tue, 25 Feb 2020 10:37:16 +1100
David Gibson <address@hidden> wrote:

> The table of RMA limits based on the LPCR[RMLS] field is slightly wrong.
> We're missing the RMLS == 0 => 256 GiB RMA option, which is available on
> POWER8, so add that.
> 
> The comment that goes with the table is much more wrong.  We *don't* filter
> invalid RMLS values when writing the LPCR, and there's not really a
> sensible way to do so.  Furthermore, while in theory the set of RMLS values
> is implementation dependent, it seems in practice the same set has been
> available since around POWER4+ up until POWER8, the last model which
> supports RMLS at all.  So, correct that as well.
> 
> Signed-off-by: David Gibson <address@hidden>
> Reviewed-by: Cédric Le Goater <address@hidden>
> ---

Irrespectively of my suggestion for the previous patch, which would
call for some adjustments in this patch, the fix is good, so:

Reviewed-by: Greg Kurz <address@hidden>

>  target/ppc/mmu-hash64.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c
> index 4f082d775d..dd0df6fd01 100644
> --- a/target/ppc/mmu-hash64.c
> +++ b/target/ppc/mmu-hash64.c
> @@ -762,12 +762,12 @@ static target_ulong rmls_limit(PowerPCCPU *cpu)
>  {
>      CPUPPCState *env = &cpu->env;
>      /*
> -     * This is the full 4 bits encoding of POWER8. Previous
> -     * CPUs only support a subset of these but the filtering
> -     * is done when writing LPCR
> +     * In theory the meanings of RMLS values are implementation
> +     * dependent.  In practice, this seems to have been the set from
> +     * POWER4+..POWER8, and RMLS is no longer supported in POWER9.
>       */
>      const target_ulong rma_sizes[] = {
> -        [0] = 0,
> +        [0] = 256 * GiB,
>          [1] = 16 * GiB,
>          [2] = 1 * GiB,
>          [3] = 64 * MiB,