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[PULL 00/46] target-arm queue
From: |
Peter Maydell |
Subject: |
[PULL 00/46] target-arm queue |
Date: |
Thu, 13 Feb 2020 14:40:59 +0000 |
Big pullreq this week, since it's got RTH's PAN/UAO/ATS1E1
implementation in it, and also Philippe's raspi board model
cleanup patchset, as well as a scattering of smaller stuff.
-- PMM
The following changes since commit 7ce9ce89930ce260af839fb3e3e5f9101f5c69a0:
Merge remote-tracking branch 'remotes/kraxel/tags/ui-20200212-pull-request'
into staging (2020-02-13 11:06:32 +0000)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20200213
for you to fetch changes up to dc7a88d0810ad272bdcd2e0869359af78fdd9114:
target/arm: Implement ARMv8.1-VMID16 extension (2020-02-13 14:30:51 +0000)
----------------------------------------------------------------
target-arm queue:
* i.MX: Fix inverted sense of register bits in watchdog timer
* i.MX: Add support for WDT on i.MX6
* arm/virt: cleanups to ACPI tables
* Implement ARMv8.1-VMID16 extension
* Implement ARMv8.1-PAN
* Implement ARMv8.2-UAO
* Implement ARMv8.2-ATS1E1
* ast2400/2500/2600: Wire up EHCI controllers
* hw/char/exynos4210_uart: Fix memleaks in exynos4210_uart_init
* hw/arm/raspi: Clean up the board code
----------------------------------------------------------------
Chen Qun (1):
hw/char/exynos4210_uart: Fix memleaks in exynos4210_uart_init
Guenter Roeck (2):
hw/arm: ast2400/ast2500: Wire up EHCI controllers
hw/arm: ast2600: Wire up EHCI controllers
Heyi Guo (7):
bios-tables-test: prepare to change ARM virt ACPI DSDT
arm/virt/acpi: remove meaningless sub device "RP0" from PCI0
arm/virt/acpi: remove _ADR from devices identified by _HID
arm/acpi: fix PCI _PRT definition
arm/acpi: fix duplicated _UID of PCI interrupt link devices
arm/acpi: simplify the description of PCI _CRS
virt/acpi: update golden masters for DSDT update
Peter Maydell (1):
target/arm: Implement ARMv8.1-VMID16 extension
Philippe Mathieu-Daudé (13):
hw/arm/raspi: Use BCM2708 machine type with pre Device Tree kernels
hw/arm/raspi: Correct the board descriptions
hw/arm/raspi: Extract the version from the board revision
hw/arm/raspi: Extract the RAM size from the board revision
hw/arm/raspi: Extract the processor type from the board revision
hw/arm/raspi: Trivial code movement
hw/arm/raspi: Make machines children of abstract RaspiMachineClass
hw/arm/raspi: Make board_rev a field of RaspiMachineClass
hw/arm/raspi: Let class_init() directly call raspi_machine_init()
hw/arm/raspi: Set default RAM size to size encoded in board revision
hw/arm/raspi: Extract the board model from the board revision
hw/arm/raspi: Use a unique raspi_machine_class_init() method
hw/arm/raspi: Extract the cores count from the board revision
Richard Henderson (20):
target/arm: Add arm_mmu_idx_is_stage1_of_2
target/arm: Add mmu_idx for EL1 and EL2 w/ PAN enabled
target/arm: Add isar_feature tests for PAN + ATS1E1
target/arm: Move LOR regdefs to file scope
target/arm: Split out aarch32_cpsr_valid_mask
target/arm: Mask CPSR_J when Jazelle is not enabled
target/arm: Replace CPSR_ERET_MASK with aarch32_cpsr_valid_mask
target/arm: Use aarch32_cpsr_valid_mask in helper_exception_return
target/arm: Remove CPSR_RESERVED
target/arm: Introduce aarch64_pstate_valid_mask
target/arm: Update MSR access for PAN
target/arm: Update arm_mmu_idx_el for PAN
target/arm: Enforce PAN semantics in get_S1prot
target/arm: Set PAN bit as required on exception entry
target/arm: Implement ATS1E1 system registers
target/arm: Enable ARMv8.2-ATS1E1 in -cpu max
target/arm: Add ID_AA64MMFR2_EL1
target/arm: Update MSR access to UAO
target/arm: Implement UAO semantics
target/arm: Enable ARMv8.2-UAO in -cpu max
Roman Kapl (2):
i.MX: Fix inverted register bits in wdt code.
i.MX: Add support for WDT on i.MX6
include/hw/arm/aspeed_soc.h | 6 +
include/hw/arm/fsl-imx6.h | 3 +
target/arm/cpu-param.h | 2 +-
target/arm/cpu.h | 95 ++++++++---
target/arm/internals.h | 85 ++++++++++
hw/arm/aspeed_ast2600.c | 23 +++
hw/arm/aspeed_soc.c | 25 +++
hw/arm/fsl-imx6.c | 21 +++
hw/arm/raspi.c | 190 ++++++++++++++++------
hw/arm/virt-acpi-build.c | 25 +--
hw/char/exynos4210_uart.c | 5 +-
hw/misc/imx2_wdt.c | 2 +-
target/arm/cpu.c | 4 +
target/arm/cpu64.c | 10 ++
target/arm/helper-a64.c | 6 +-
target/arm/helper.c | 327 +++++++++++++++++++++++++++++---------
target/arm/kvm64.c | 2 +
target/arm/op_helper.c | 14 +-
target/arm/translate-a64.c | 31 ++++
target/arm/translate.c | 42 +++--
tests/data/acpi/virt/DSDT | Bin 18462 -> 5307 bytes
tests/data/acpi/virt/DSDT.memhp | Bin 19799 -> 6644 bytes
tests/data/acpi/virt/DSDT.numamem | Bin 18462 -> 5307 bytes
23 files changed, 731 insertions(+), 187 deletions(-)
- [PULL 00/46] target-arm queue,
Peter Maydell <=
- [PULL 01/46] i.MX: Fix inverted register bits in wdt code., Peter Maydell, 2020/02/13
- [PULL 04/46] arm/virt/acpi: remove meaningless sub device "RP0" from PCI0, Peter Maydell, 2020/02/13
- [PULL 03/46] bios-tables-test: prepare to change ARM virt ACPI DSDT, Peter Maydell, 2020/02/13
- [PULL 02/46] i.MX: Add support for WDT on i.MX6, Peter Maydell, 2020/02/13
- [PULL 06/46] arm/acpi: fix PCI _PRT definition, Peter Maydell, 2020/02/13
- [PULL 05/46] arm/virt/acpi: remove _ADR from devices identified by _HID, Peter Maydell, 2020/02/13
- [PULL 07/46] arm/acpi: fix duplicated _UID of PCI interrupt link devices, Peter Maydell, 2020/02/13
- [PULL 08/46] arm/acpi: simplify the description of PCI _CRS, Peter Maydell, 2020/02/13
- [PULL 09/46] virt/acpi: update golden masters for DSDT update, Peter Maydell, 2020/02/13
- [PULL 12/46] target/arm: Add isar_feature tests for PAN + ATS1E1, Peter Maydell, 2020/02/13